( ESNUG 437 Item 2 ) -------------------------------------------- [01/11/05]
Subject: Top 50 ESNUG Items For 2004
MAGMA IS MOVING UP: It's one thing to say that the ESNUG mailing list
has 21,788 subscribers. It's quite another to figure out what the readers
are reading. This where the clicks on DeepChip.com tell you what's on
people's minds. And talk about momentum. Last year the 2003 stats in
ESNUG 422 #7 had Magma being discussed in 3 of the top 15 Items of 2003.
This year, Magma was discussed in 7 of the top 15 Items of 2004. Magma
has moved up in user's mind -- or at least that's what the clicks say.
Other news of note was that Mentor Exemplar was the #1 clicked on Item
in 2004. The Get2chip vs. Synopsys Design Compiler Nighthawk battle,
Palladium vs. Verisity Axis battle, Sierra Pinnacle, and Silicon Canvas
Laker were all big click items for 2004.
Out of the top 50 ESNUG Items of 2004, a surprizing 36 (72%) of them were
primarily non-Synopsys discussions. Last year, this number was 39 (78%).
The #1 topic had 16,876 pageviews; the #50 topic had 4,371 pageviews.
The Top 50 ESNUG Items For 2004
---------------------------------
1. Mentor Exemplar vs. Synplicity vs. Xilinx XST vs. Altera Quartus
http://www.deepchip.com/posts/0426.html
2. A Boatload of DC 2004.6 Nighthawk Customer Benchmarks
http://www.deepchip.com/items/0424-01.html
http://www.deepchip.com/items/0429-02.html
http://www.deepchip.com/items/0433-05.html
http://www.deepchip.com/items/0434-02.html
3. Cadence Get2chips RTL Compiler vs. Synopsys DC Benchmarks
http://www.deepchip.com/items/0429-03.html
http://www.deepchip.com/items/0431-02.html
http://www.deepchip.com/items/0434-01.html
4. A User's Cadence Quickturn Palladium vs. Verisity Axis Benchmark
http://www.deepchip.com/items/0428-01.html
http://www.deepchip.com/items/0430-04.html
5. Magma Tool Broke; Can Astro Do Hierarchy plus Voltage Islands?
http://www.deepchip.com/items/0433-11.html
http://www.deepchip.com/items/0434-09.html
6. Customer Does A Detailed Comparision Of Magma 3.2 and Magma 4.0
http://www.deepchip.com/items/0431-06.html
http://www.deepchip.com/items/0432-06.html
7. Aart on Magma Marketshare & Cadence Open Access; Neolinear Rebutts
http://www.deepchip.com/items/0425-05.html
http://www.deepchip.com/items/0427-04.html
8. Two Hands-On Customers Give Their Report on Sierra Pinnacle
http://www.deepchip.com/items/0433-01.html
http://www.deepchip.com/items/0435-03.html
9. A Chip Designer Asks What Do Gate-Level Sims Buy You These Days?
http://www.deepchip.com/items/0420-04.html
http://www.deepchip.com/items/0421-01.html
10. User Wonders If Synopsys Is Copying Magma's Synthesis Algorithms?
http://www.deepchip.com/items/0430-03.html
http://www.deepchip.com/items/0431-09.html
11. A Detailed Customer Critique of Silicon Canvas Laker
http://www.deepchip.com/items/0422-06.html
http://www.deepchip.com/items/0427-12.html
12. The Magma Blast Fusion Customer Tape-out Listing Before DAC'01
http://www.deepchip.com/items/0374-07.html
13. Our DC, Magma, Hercules, Star-RC, PrimeTime, Artisan, IBM Tape-out
http://www.deepchip.com/items/0430-07.html
14. Using PrimeTime-SI, PhysOpt, and Astro to Address Crosstalk Delay
http://www.deepchip.com/items/0432-07.html
15. An Eval Of Magma Blast Fusion, Blast Rail, EM, STA, IR-drop Delays
http://www.deepchip.com/items/0421-10.html
http://www.deepchip.com/items/0424-06.html
16. Some PrimeTime Guidelines For Logical & Physical Design Hierarchy
http://www.deepchip.com/items/0422-03.html
17. 8 Engineers Discussing 7 Types Of Adder Hardware Implementations
http://www.deepchip.com/items/0343-13.html
18. The Nassda HSIM Interface with Cadence NC-Sim & NC-Verilog
http://www.deepchip.com/items/0420-03.html
http://www.deepchip.com/items/0424-09.html
19. Cliff's SNUG'00 1st Place Paper On Nonblocking Verilog Assignments
http://www.deepchip.com/items/0347-01.html
20. Synplicity ASIC vs. DC Gets Mixed User Reviews
http://www.deepchip.com/items/0422-05.html
21. A User Review Of The Unannounced Monterey AFP Block Floorplanner
http://www.deepchip.com/items/0429-01.html
22. Customer Benchmark Shows PrimeTime-SI 2004.06 Now Less Pessimistic
http://www.deepchip.com/items/0431-05.html
23. A Detailed User Critique of Magma's Power Tool Set Shown at DAC'04
http://www.deepchip.com/items/0435-02.html
24. Designer Asks Designers "How Does Your Chip Do Power-On Reset?"
http://www.deepchip.com/items/0433-03.html
25. Cooley Provides More Data on the Synopsys Vera Marketing Fiasco
http://www.deepchip.com/items/0339-11.html
26. A Boatload Of Letters On Sync vs. Async Resets
http://www.deepchip.com/items/0409-11.html
27. Choosing Apache RedHawk-SDL Over Simplex VoltageStorm for IR Drop
http://www.deepchip.com/items/0413-04.html
http://www.deepchip.com/items/0414-04.html
http://www.deepchip.com/items/0424-04.html
28. 5 Users Report On The 2003 Magma Users Group Meeting
http://www.deepchip.com/items/0420-06.html
29. Lawrence's Hands-On Detailed Technical User Review Of CoWare N2C
http://www.deepchip.com/items/0428-08.html
30. Using FastScan & TestKompress for At-Speed Scan Testing with PLLs
http://www.deepchip.com/items/0428-03.html
31. User Benchmark Finds CeltIC Much More Accurate Than PrimeTime-SI
http://www.deepchip.com/items/0420-01.html
32. A Denali vs. DW Mem Controller Bake Off (the Denali Part)
http://www.deepchip.com/items/0415-01.html
33. What Are The Real Synopsys, Cadence, Magma 90 nm Usage Numbers?
http://www.deepchip.com/items/0424-08.html
34. Tera Systems CEO has Left; How about Aprio and DFM?
http://www.deepchip.com/items/0435-01.html
http://www.deepchip.com/items/0436-01.html
35. Readers On Possible Precedent In Zombie-Slave Employment Contracts
http://www.deepchip.com/items/0431-07.html
36. Synplicity vs Xilinx ISE vs Mentor vs Synopsys FPGA Compiler II
http://www.deepchip.com/items/0427-01.html
37. 65 nm Is Going To Be Hell If The Fabs Won't Release The Rules!
http://www.deepchip.com/items/0427-10.html
38. A False Equivalence Warning for Formality 2003.06 and 2004.03
http://www.deepchip.com/items/0430-02.html
39. Beta Presto User Seeing Good VHDL ASIC Results
http://www.deepchip.com/items/0428-02.html
40. Ray Clarifies The Cadence Product Stance On System Verilog
http://www.deepchip.com/items/0424-03.html
41. Ulrich on 0-in, @HDL, BlackTie, RealIntent, Cadence FormalCheck
http://www.deepchip.com/items/0428-04.html
42. Step-by-Step Using Magma BlastFusion With Mentor Calibre DRC/LVS
http://www.deepchip.com/items/0416-06.html
43. Astro 2003.09 "There is subsequent bug fix release being planned"
http://www.deepchip.com/items/0421-06.html
44. Script Gets First Encounter DEF Wire Tracks & Rows Data Into Astro
http://www.deepchip.com/items/0422-01.html
45. Cadence Addresses the Support Issues from the ICU 04 Trip Report
http://www.deepchip.com/items/0434-08.html
46. PrimeTime Magic Switch to Report Unconstrained Paths is Tricky
http://www.deepchip.com/items/0427-03.html
http://www.deepchip.com/items/0428-06.html
47. A Monterey User Speaks Up About Magma Complaints
http://www.deepchip.com/items/0421-07.html
48. 5 Ways Users Can Mess Up Their Calibre-xRC Parasitic Extraction
http://www.deepchip.com/items/0431-03.html
49. Beaucoup Chip Designers Chime In On The FPGA vs. ASIC EDA Debate
http://www.deepchip.com/items/0413-05.html
50. Two Hands-On Users Share Their Experiences With DC-FPGA
http://www.deepchip.com/items/0427-02.html
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