( ESNUG 433 Item 5 ) -------------------------------------------- [10/20/04]

Subject: ( SNUG 04 #4 ) 3 More Users Benchmarking DC 2004.06 (Nighthawk2)

> The runtime for that same block was further reduced using DC 2004.06
> (Nighthawk2) by 47%.  This was almost unbelievable.  Just to give you
> an idea about the runtimes:
>
>                      DC 2003.06 : 11 hours
>                      DC 2003.12 :  8 hours 30 min
>         DC 2004.06 (Nighthawk2) :  4 hours 30 min
>
> In some other cases (mostly bottom compilation) there was little or no
> changes. 
>
>     - Pierre Ragon
>       Lucent


From: Haizhou Chen <hchen=user domain=marvell spot calm>

Hi John,

We upgraded to the most recent DC Ultra release, 2003.12-SP1, and we
were able to reduce area and improve timing. For this specific design, we
also used DFT Compiler for scan synthesis (one pass) and DC Ultra was able
to provide 7% better area, 30% better timing, and roughly a 2-3x runtime
advantage over a competitive synthesis tool.  We also tried earlier DC
releases, but find 2003.12-SP1 to provide the best results.

    - Haizhou Chen
      Marvell Semiconductor                      Sunnyvale, CA

         ----    ----    ----    ----    ----    ----   ----

From: Vikram Somaiya <somaiya464=user domain=oki spot calm>

Hi John,

I wanted to share my experience with Design Compiler 2004.06.  We recently
benchmarked the DC 2004.06 release on 3 separate designs with impressive
results:

  1. Huge QoR improvements in 2004.06 over 2003.12  In one of the test cases
     area improved by 20%.
  2. Huge Runtime Improvements  On the average we saw a 1.5X runtime
     improvement on the same platform

Just moving to the latest release did not give us the best results.  The
results with our legacy scripts were really poor compared to the other
competing synthesis tools available.  Our Synopsys AE recommended us some
simple changes, definitely less painful then re-writing scripts from scratch
for the competitive synthesis tools.  All we did was to:

  1. set compile_seqmap_synchronous_extraction true
  2. set_max_area 0
  3. set compile_map_for_area true
  4. set dw_prefer_mc_inside true

No changes to our Power Compiler and DFT Compiler scripts were needed.

The results:

                                  WNS        Instances
                                  ---    ------------------
   1)   Legacy Scripts             0          21 K
        Updated Scripts            0          18 K (14% smaller)

   2)   Legacy Scripts             0          53 K
        Updated Scripts            0          48 K ( 9% smaller)

   3)   Legacy Scripts             0         183 K
        Updated Scripts            0         144 K (21% smaller)


I should add that all our testing was done on TCL mode and not on the new
mode in DC called DC-XG which I am told that improves capacity even more.

Clearly, competitive pressures have resulted in improvements in DC but
simple script changes are required to get the best QoR and runtime.  With
these results we see no reason to move from our stable DC flows.

    - Vikram Somaiya
      OKI Semiconductor                          Sunnyvale, CA

         ----    ----    ----    ----    ----    ----   ----

From: Sam Bishai <sbishai=user domain=cisco spot calm>

Hello John,

I want to report to ESNUG the improvements with DC 2004.06.  It's so good
we designed all our troubled blocks in our chip using the beta version, and
then changed to the production version just before tapeout.  Yes, we have
already taped out using this version.

Our old flow based on DC 2003.06 with bottom up compile was just not cutting
it on our designs.  Runtimes were long and we were forced to use a 64-bit
machine to complete synthesis.  Then earlier this year we got wind of some
new technology called Nighthawk that Synopsys was working on to speed up
runtimes.  We twisted our AC's arm on letting us get early access to this
code and saw really good results.  Comparing the log files of the Nighthawk
version versus 2003.06 it is clear that Synopsys has fundamentally changed
the compile flow.

 - resource allocation & structuring mapping is significantly faster
 - there are now less steps preceding the "Delay Optimization Phase"
 - a single step for Design Rule Fixing vs. a 2 phase Design Rule Fixing
   in the older compile flow
 - area recovery phase is faster

The results comparing 2003.06 with the Nighthawk 2004.06 beta.  The test
design is a large, critical block in one of our 130 nm chips.  We got 3X
faster runtime with more then 5X reduction in TNS with the biggest
improvement in capacity.  We were able to move to a 32-bit Solaris machine
from 64 bits.  We were also able to fit our design on our 32-bit Linux
boxes and got even faster turnaround time.

                  DC 2003.06       DC 2004.06 beta Nighthawk
                 ------------      -------------------------
        Runtime     61 hrs                 20 hrs
   Area (cells)    1.1 M                  1.1 M
            WNS   -0.5 ns               -0.15 ns
            TNS   1318 ns                -229 ns

Of course nothing is for free.  We did have to make one change to our
scripts; removed any explicit use of uniquify commands.  DC now does this
automatically.  Actually, this single change made our scripts much easier
to maintain, and the runtime improved drastically.

We actually compared the beta release with the production release on one
block of the chip that we were taping out to make sure that Synopsys had
not dropped the ball; after all we were going to change the version at
the very last moment.  The results are as below and surprisingly they are
consistently better with the production release in area and timing

  Version    Compile Methodology    Failing Paths   WNS    TNS     Area
 ----------  --------------------   -------------  -----  -----   ------
 NightHawk2  Medium + Incr High         807       -0.120  -46.72  7800470
  2004.06    Medium + Incr High          91       -0.030   -1.52  7764774
  2004.06    Medium + Ultra Incr High     0          0       0    7770156
  2004.06    Ultra High + Incr High       0          0       0    7764757

DC is on a roll; 3X faster runtimes with 5X reduction in TNS is just sweet.

    - Sam Bishai     
      Cisco Systems                              Kanata, ON, Canada


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