( ESNUG 431 Item 5 ) --------------------------------------------- [07/14/04]
From: Lydia Lee <llee=user domain=esilicon spot calm>
Subject: Customer Benchmark Shows PrimeTime-SI 2004.06 Now Less Pessimistic
Hi John,
We've been looking to reduce the pessimism in PrimeTime-SI. Our AE informed
us that there have been accuracy improvements in 2004.06. I just wanted to
let you know the results of our comparison between PT-SI 2003.12 and
PT-SI 2004.06.
Our AE sent us a beta version of a SolvNet app note on their new path-based
analysis.
Some of the pessimism in PT static timing analysis is due to worst-slew
propagation. This is where two slews arrive at a common pin, and one must
be chosen to propagate forward. For example, an AND gate has two timing
arcs (A-Z and B-Z).
_____ two timing arcs A -> Z
A ---| \ and B -> Z
| AND >--- Z
B ---|_____/
These two timing arcs which both arrived at point Z may have different
slews and arrival times. The default mode of PT and PT-SI is worst_slew
propagation, which can be pessimistic if a cell has a later arrival input
that has a faster slew. The 2004.06 release has a new command in it called
"get_recalculated_timing_paths". With this command, a single path can be
considered at a time, and the path-specific slews are propagated which will
provide us a more accurate result. The only drawback is that this is
calculated on a single path basis, so even if it passes, another path to
the same endpoint may still fail. So, in order to prove that the end point
will fully pass timing, you need to extensively test out all of the failing
timing paths to that end-points.
Their app note provides detailed information and diagrams to explain their
analysis method, and a Tcl script to extensively test all the paths that
go to each endpoint and provides a summary on the results. I found the
app note useful.
Below shows the result of our designs in 2003.12-SP1, 2004.06, and 2004.06
using the new path-based analysis:
Design #1
PrimeTime 2003.12-SP1
Reg2Reg (min) WNS = -0.14, TNS = -2.55, # of Vio paths = 51 (Scan)
Reg2Reg (min) WNS = -0.06, TNS = -0.20, # of Vio paths = 9 (Non-Scan)
# of max_trans violations = 5102
PrimeTime 2004.06
Reg2Reg (min) WNS = -0.12, TNS = -1.73, # of Vio paths = 38 (Scan)
Reg2Reg (min) WNS = -0.01, TNS = -0.01, # of Vio paths = 1 (Non-Scan)
# of max_trans violations = 1231
PrimeTime 2004.06 - Path-based recalculation from AE's script
Reg2Reg (min) WNS = +0.03
Reg2Reg (min) WNS = +0.09
Design #2
PrimeTime 2003.12-SP1
Reg2Reg (min) WNS = -0.06, TNS = -0.36, # of Vio paths = 20
Reg2Out (min) WNS = -0.10, TNS = -6.15, # of Vio paths = 148
# of max_trans violations = 569
PrimeTime 2004.06
Reg2Reg (min) WNS = -0.04, TNS = -0.10, # of Vio paths = 6
Reg2Out (min) WNS = -0.06, TNS = -2.16, # of Vio paths = 83
# of max_trans violations = 510
PrimeTime 2004.06 - Path-based recalculation from AE's script
Reg2Reg (min) WNS = -0.03, TNS = -0.03, # of Vio paths = 3
Reg2Out (min) WNS = -0.05, TNS = -1.64, # of Vio paths = 75
Without considering path-based analysis, the timing in 2004.06 is less
pessimistic than 2003.12-SP1. Our AE tells us that this is due to a new
algorithm for handling disturbed crosstalk waveforms. This is confirmed
by the large reduction in max_transition violations. When path-based
analysis is applied, the results are evenbetter. Design #1 passes timing
completely after path-based analysis.
There are still some minor bugs in "get_recalculated_timing_paths":
- In one case, the propagated clock latency of the launching clock is
lost after recalculation.
- In another case, the ideal latency of virtual clocks referenced by
input/output delays are zeroed.
- It also currently should not be used with clock-gating or data-to-data
checks, or corruption of the design's timing can occur.
Also, the script may run for quite a long time if it is run on a design
with a lot of failing points that pass after recalculation. But
overall, I find this new feature and the provided script very useful!
We are very pleased with the accuracy improvements in 2004.06, and the
further improvements that path-based analysis provides.
- Lydia Lee
eSilicon Corp. Sunnyvale, CA
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