( ESNUG 424 Item 1 ) -------------------------------------------- [03/09/04]
From: Philip Jackson <philip.jackson=user domain=conexant spot calm>
Subject: User Finds Unreleased Ver. Of DC (Nighthawk2) Has Faster Runtimes
Hi John,
I wanted to inform you that I am seeing large runtime improvements and
memory capacity reductions using a special pre-released version of Synopsys
Design Compiler - code named Nighthawk2.
With our old methodology using DC 2003.06-SP1, our M+ gate design runtimes
took several days, and the design would only fit on a 64-bit machine
(it took 7GB of memory). This was unacceptable and we were forced to look
at alternatives (Magma). When Synopsys heard about this, they dedicated
their AC resources to our project to investigate our runtime and capacity
issues. In the end, we were able to fit the design into 2.5 GB, allowing
us to move synthesis to a Linux box (about twice as fast as our best Solaris
machine). The synthesis (RTL to a scan inserted, maximum timing closed
netlist) now only takes about 5 hours to complete!
The main things we did to get these DC performance improvements are:
1) Used Design Compiler Nighthawk2 - this version is far better than
what's available today. I am told that the runtime enhancements will
be incorporated in the 2004.06 release. This release made a huge
difference in the runtime for our design. Note that we no longer
"uniquify" with this tool as it is not needed (which saves memory).
2) We "set timing_self_loop_no_skew false". We used to have this switch
set true in our common start up scripts with no serious impact on our
runtimes. Somewhere along the way, this changed. Having this switch
set true dramatically increases runtimes.
3) Changed our scan insertion flow from "insert_scan" to "insert_dft".
We use "set dft_optimization_configuration -none -preserve true".
This eliminates designs from being duplicated in memory with a "_test"
name. This yields a sizeable reduction in required memory when doing
scan insertion.
Other things we did which moderately improved our runtimes include:
1) Only load the max libraries since we skip hold time fixing in Design
Compiler. We let Magma fix the post layout timing, so there's no need
to load the min libraries or fix holds before the design is layed-out.
2) Reduced the number of exceptions (false paths) that use the
"-through" option. We now use "-from"/"-to" as much as possible
instead of "-through".
3) Changed our compile flow from middle-bottom up to top down.
Originally, we were forced to break up the design due to the large
amount of memory required to synthesize the design. Our preference and
normal method is top down. With the memory reduction that we were able
to achieve using DC Nighthawk2, we were able to go back to a top down
script.
4) Turned off checkpointing. We used this as a means to capture a .db
file at a point in the multi-day run to proceed to layout with (note
that when using the old DC, we never finished area optimization).
Now that our runtime is 5 hours, there is no need for checkpointing.
Our current top down DC Nighthawk2 script does the following:
1) Analyze/Elaborate the RTL
2) Constrain the design and do a "compile". Generate reports.
3) Insert scan (using insert_dft). Generate reports.
4) Constrain the design and do a compile -inc. Generate reports.
Note that step 1 takes about 1 hour, step 2 takes about an 1.5 hours, step
3 takes about 1 hour, and step 4 takes about 1.5 hours. Note that report
creation accounts for about 1.5 hours of the total runtime. The two
compiles each take about 1 hour to execute (default map/area effort, no
hold fixing).
- Philip Jackson
Conexant Systems, Inc. Newport Beach, CA
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