( ESNUG 424 Item 8 ) -------------------------------------------- [03/09/04]


Subject: What Are The Real Synopsys, Cadence, Magma 90 nm Usage Numbers?

> As a professional courtesy, I called Gary Smith of Dataquest to tell
> him about these attendance numbers before publishing them.  I could hear
> his keyboard clicks as I told him the data. 
>
>     - from http://www.deepchip.com/gadfly/gad021004.html


From: Kuhoo Goyal Edson <kuhoo=user  domain=kuhooz spot calm>
To: Gary Smith <gary.smith=user  domain=gartner spot calm>

Hi Gary and John,

I am trying to separate B.S. and speculation/claims from reality.  Can you
help?

I believe there are about 160 90 nm design being done to date.  (Intel, ATI,
Motorola, Fujitsu, ST, NEC, Philips, Infineon...)   About 1/2 of those have
taped out (~80).

Of those 80 tapeouts, between 30-40 have taped out using the complete
Cadence SoC Encoutner flow (minus synthesis -- DC is used).

Less than 10 have been taped out using the Magma Flow -- all of those had
FE in the front and DC for synthesis and some (NEC designs) had NanoRoute
in the backend.

That leaves Synopsys with between 30-40 tapeouts as well.  Of these, my gut
would tell me most had First Encounter for prototyping and some had CeltIC
for sign-off.

So, is it in the ballpark or safe to say that at 90 nm, Synopsys and Cadence
lead the industry from technology usage standpoint?  That Magma is still a
distant 3rd?  That regardless of the main EDA vendor used to design at
90 nm, I count of the following being in majority of the flows:

    Design Compiler from Synopsys
    First Encounter from Cadence
    CeltIC from Cadence
    Cadence NanoRoute or Synopsys Astro/Apollo
    For the Magma designs, most use NanoRoute for final routing
    Calibre from Mentor

I think it is time to clear it up.  My numbers/assumptions may be all wrong.
I just want to know what the right info is.  People are tired of hearing
Rajiv tell everyone that he has the 90 nm market cornered.  They are tired
of hearing Ray say that Magma has little to zero 90 nm involvement.  And
they are tired of Aart saying Synopsys has 100% of the 90 nm market.

I am not calling any of them liars; I am saying that they all have their own
truths and now it is time to figure out the real truth.

John, since you have the voice of the people, can you try and shed some
light on this?  Maybe a survey is warranted?  What do you think?
    
    - Kuhoo Goyal Edson
      KuhooZ, Inc.                               Saratoga, CA

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From: Gary Smith <gary.smith=user  domain=gartner spot calm>
To: Kuhoo Goyal Edson <kuhoo=user  domain=kuhooz spot calm>

Kuhoo,

It's a mixed bag.  If I remember right Aart said there were about 160 90 nm
designs and that he had around 80% of them (his DesignCon speech I think).
Bryan, what are our numbers on 90 nm designs?

Today Design Compiler is being pushed as the front end to Galaxy, as
Synopsys has failed at two attempts to market a floorplanner.  DC doesn't
work well, as an input, so most of the engineers that I talk to use First
Encounter.  I'm also seeing more and more engineers using CeltIC for SI.
I don't see SoC Encounter used that much outside of Philips.

Keep in mind Magma has been primarily a Block Design Tool, so it's being
used in both Cadence and Synopsys flows.  This has given Magma good
penetration into the market.  Can you say that gives them a tape out?
Probably not as their tape out would go into a larger design.  In the last
9 months Magma has concentrated on squeezing out the slack, in their
process, and increasing their block size.  That means they are being used
more and more for the entire chip design, not just part of another
IC Implementation design flow.

Today I would say the most popular flow would be First Encounter, and
increasingly CeltIC, with 1 million to 5 million gate blocks being design
using the Magma flow, all put together in Synopsys Galaxy.

    - Gary Smith
      Dataquest                                  San Jose, CA

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From: John Cooley <jcooley=user  domain=zeroskew spot calm>
To: Bryan Lewis <bryan.lewis=user  domain=gartner spot calm>

Bryan,

I never heard your follow-up to this.  How many 90 nm designs are your
Dataquest guys seeing?

    - John Cooley
      Holliston Poor Farm                        Holliston, MA

         ----    ----    ----    ----    ----    ----   ----

From: Bryan Lewis <bryan.lewis=user  domain=gartner spot calm>
To: John Cooley <jcooley=user  domain=zeroskew spot calm>

Hi John,

Last year (2003), there were less than 100, even less than 50 from what
we could find according to our survey.  We have estimated that there will
be about 275 this year as best we can determine talking to people.  160 to
date sounds in the "ball park" to me.  What do you folks think?

    - Bryan Lewis
      Dataquest                                  San Jose, CA


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