( ESNUG 429 Item 3 ) --------------------------------------------- [06/03/04]

From: Neil Horowitz <nhorowitz=user  domain=telasic spot calm>
Subject: Cadence Get2chips RTL Compiler vs. Synopsys DC Benchmarks Wanted

Hi, John,

Can you refer me to any published benchmarks between Cadence (Get2chip)
RTL Compiler vs. Synopsys Design Compiler?

    - Neil Horowitz
      TelASIC Communcations                      El Segundo, CA
 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise
"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form | 

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)