!!! "It's not a BUG, jcooley@world.std.com
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / DAC'02 Trip Report:
_] [_ The Rome-Is-Burning DAC in New Orleans
- or -
223 Engineers Review 2002's Crop of EDA Tools of June 10-14, 2002
by John Cooley
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
"When shall we three meet again? In thunder, lightning, or in rain?
When the hurlyburly's done. When the battle's lost and won."
- Macbeth, Act I, Scene 1
( DAC 02 Subjects ) --------------------------------------------- [ 9/10/02 ]
Item 1: The DAC Numbers
Item 2: Synchronicity, CVS, Runtime DA, ClioSoft, Oridus, InterWeave
Item 3: Celoxica, Forte, CoWare, SystemC, Seamless, Cadence Testbuilder
Item 4: Summit, TenisonTech, Virtio, Translogic
Item 5: Superlog, Vera, Verisity
Item 6: Atrenta SpyGlass, TransEDA VNCover, Verisity SureLint, Novas
Item 7: Sequence PowerTheatre, Power Compiler, Iota, ChipVision, Multigig
Item 8: O-in, Real Intent, @HDL, Averant, Ketchum, EDAptive
Item 9: Tempus Fugit, Innologic, BlackTie, Veritable, Obsidian, Novilit
Item 10: SynaptiCAD, Forte Perspective, Esterel, TNI-Valiosys
Item 11: TetraMAX, Mentor FastScan & testKompress, LogicVision, Genesys
Item 12: Quickturn, Mentor, Axis, IKOS, Tharas, Bridges2Silicon, SimPOD
Item 13: Synopsys PhysOpt, Floorplan Compiler, Avanti Jupiter
Item 14: Cadence PKS & First Encounter
Item 15: Monterey Dolphin, Sonar, & Aristo IC Wizard
Item 16: Magma Blast Plan/Prototype/Fusion, Sequence, Incentia, Golden Gate
Item 17: InTime, Icinergy, AmmoCore, Tera Systems TeraForm
Item 18: Apollo/Astro, Plato NanoRoute, Silicon Ensemble, Pulsic, Columbia
Item 19: Tanner Tools, IC-Editors Inc.'s ICED, InternetCAD.com
Item 20: Nassda, Apache, Nanosim, Celestry, Silvaco, EverCAD, FTL, Spectre
Item 21: Simplex, Apache, PrimeTime-SI, Iota, Celestry, EPIC
Item 22: Calibre, Hercules, Venus, Dracula, Diva, Vampire, Bindkey, Matrics
Item 23: Fire&Ice QX, Columbus, Nautilus, StarRC-XT, Arcadia, Calibre-XRC
Item 24: Barcelona, Antrim, Analog DA, NeoLinear, Saber
Item 25: Prolific, Cadabra, Circuit Semantics, Silicon Metrics, Zenasis
Item 26: Sagantec, RubiCAD, Q Design/Marple, Numerical OPC, Avanti Taurus
Item 27: Best/Worst DAC Parties & Freebies
============================================================================
Trying to figure out a Synopsys bug? Want to hear how 14,063 other users
dealt with it? Then join the E-Mail Synopsys Users Group (ESNUG)!
!!! "It's not a BUG, jcooley@TheWorld.com
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
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