( DAC'18 Item 1 ) ------------------------------------------------- [12/14/18]
Subject: User buzz on Siemens/Solido machine learning is #1 for Best of 2018
THE MERGER THAT WORKED: the cultural norm in EDA is once a EDA start-up gets
acquired -- even if it's a wildly sucessful start-up -- it gets quietly lost
in the "parent" company -- very rarely -- or never to be heard from again.
Viewlogic, Nassda, 0-in, Oasys, Pyxis, Sierra, Cadis, Arkos, Epic, Gambit,
C-Level, Compass, Frontline, Synfora, Extreme-DA, Magma, Comdisco, Redwood,
CCT, Ambit, Denali, Get2Chip, Varium, ClearShape, Forte all come to mind.
So when Siemens/MENT bigwig Ravi Subramanian made the decision to buy out
Amit Gupta's Solido in Nov. 2017 (ESNUG 577 #4), it didn't come to anyone as
a surprise. Both companies had a very strong multi-year relationship. And
both did exceptionally well with the users in their respective EDA niches.
Solido ML, BDA Ravi, Tom Beckley SSS makes #2 for Best of 2017
BDA, Solido, MunEDA, and Silvaco get #5 for Best EDA of 2016
Mentor BDA AnalogFastSpice and Solido were #4 tools at DAC'15
Mentor BDA AnalogFastSpice and Solido were #4 tools at DAC'14
Berkeley DA ACE & AFS Mega, Solido variation were #4 at DAC'13
Berkeley AFS Memory Sim, Solido PVT as #3 hot tool at DAC'12
But to be honest, once the Nov. 2017 acquisition happened, I expected Amit
to be gone within 6 months and these glowing user comments to dry up.
So I was caught flat footed when I looked at the word counts of what the
users had to say specifically about Solido this year vs. prior years ...
2018: :##################################### 2,748 Solido user words
2017: :################# 1,282
2016: :############### 1,110
2015: :############# 979
2014: :####### 524
2013: :############ 884
RIGHT PLACE, RIGHT TIME: WTF!?? Solido users were 2.1X *happier* with Solido
*after* the Siemen/MENT acquisition?? It's not supposed to happen that way!
Then I figured it out. What got funky during this timeframe is technology
changed -- as technology is known to do ...
Amit on Solido machine learning, lib characterization, and Siri
User buzz on Solido machine learning makes #2 for Best of 2017
Ravi's newly aquired Solido machine learning was 100% at the right place and
at the right time as it applies to EDA tools -- plus Ravi and Amit knew how
to spread ML throughout the massive Siemens customer base -- thus earning it
one of those exceedingly rare user-given MERGERS THAT WORKED Awards -- and
also gaining the DeepChip User-Voted #1 Best of 2018 Award, too! Wow.
---- ---- ---- ---- ---- ---- ----
---- ---- ---- ---- ---- ---- ----
---- ---- ---- ---- ---- ---- ----
QUESTION ASKED:
Q: "What were the 3 or 4 most INTERESTING specific EDA tools
you've seen this year? WHY did they interest you?"
---- ---- ---- ---- ---- ---- ----
I use Solido Variation Designer for statistical analysis for process
corners. It's a good tool.
Machine Learning is Solido's core differentiator compared with ADE-XL
and G-XL. We verified it well -- it responded well and converged
within as a reasonable time.
It gets us results for many corners where Cadence is incapable.
Basically, our approach is:
- We use CDN ADE-XL and/or G-XL for smaller projects.
- Then if we have more than 10K simulations, we switch to Solido.
As an example of Solido's savings, if we needed 100,000 simulations,
- Cadence and Synopsys would run all 100,000 simulations.
- Solido only runs 2,000 simulations and still understands what
causes the variation.
Through machine learning Solido finds the sensitive elements, so you
only simulate them, and don't waste time on parts with no variation
or have only tiny variation impact. We did a lot of verification work
to make sure Solido was accurate.
Once the analysis is done, Solido plots graphs to show your convergence,
so you can interpret the statistical data visually, and tell if you are
close and have seen it all -- or not. Have you found the bad corners or
not? If not, then you can change your set-up.
---- ---- ---- ---- ---- ---- ----
Solido Machine Learning (ML) Characterization + SNPS SiliconSmart
We have integrated MLChar into our SNPS SiliconSmart characterization
flow for our standard cells libraries to have a recovery mechanism for
the cells which cannot be predicted in the target corners. (The corners
we predict using MLChar.)
We use it's machine learning in two main functions:
- Predict corners from existing corners for std cell libs. (40/60
ratio; predict 40% of corners and characterize 60% of corners)
- Predict corners for new PDK's using the corners from the
previous PDK in the same process technology
In both cases the input are existing characterized libraries and the
output are the predicted libraries in new corners.
Our timing savings estimation is 30% to 40% over using an ADE-XL flow.
The savings is in characterization time and resource utilization.
As I said before, we have integrated the Solifo MLChar tool in our
SiliconSmart characterization flow recovery mechanism for cells which
may fail during prediction. This prediction flow is running stand
alone. We are using Synopsys SiliconSmart for characterization.
We are looking at MENT Kronos to see exactly how it will perform relative
to SiliconSmart in terms of running time, accuracy and throughput.
With regard to machine learning techniques, the models built by Solido
for library corner prediction are very accurate and comprehensive. Also
the SW implementation for MLChar is scalable and can run on thousands of
CPUs very fast and with small memory footprint. MLChar is suitable to
run on Cloud on thousands of CPUs.
In general, ML technology is at infancy in EDA. There are solutions
which are starting to be part of production flows but in terms of
deployment and penetration in the main EDA tools and flows used in VLSI
design I would say it is still in infancy (10% relative to potential
scope of deployment).
---- ---- ---- ---- ---- ---- ----
MENT Solido Variation Designer complements our standard CDNS ADE
brute-force Monte Carlo (MC) circuit simulation by providing more
coverage with verifiable statistical confidence for the circuit
parameters we are interested in analyzing.
We use it daily.
Variation Designer's main advantage is its huge reduction of total
simulation time, while covering a larger sample space, to give our
circuit designers a sense of how their circuit performs in various
tail conditions -- something impossible for traditional ADE MC to
capture.
The Solido tool does sample selection based on machine learning (ML),
and I can attest that:
- It can provide order-of-magnitude speed up over traditional
Cadence Monte Carlo.
- For larger blocks, the speed up is even higher.
- We were able to simulate some large blocks that were
impossible to run in the past in the Cadence environment.
We have used Solido ML for small/medium circuits with a high number
of variables.
Solido's sample space is much higher than Cadence's. The tool does
"sample space verification" to help our designer understand whether
the final result can be trusted. Because the sample selection process
can be verified, the accuracy is good.
The Solido tool provides a verification report, so we can visually
check that the results are accurate. Also, the GUI is getting better
than earlier versions.
Overall, I'd highly recommend it. Solido is part of our sign-off flow.
---- ---- ---- ---- ---- ---- ----
Solido Variation Designer saves lot of time for high sigma Monte Carlo
due to its machine learning algorithms.
Its ability to see (through machine learning) which parameters have
maximum impact on variation is key.
It's an excellent tool. But more importantly, Solido's support is very
good.
---- ---- ---- ---- ---- ---- ----
Solido's Variation Designer PVTMC Verifier (MLChar) tool used machine
learning to reduce our number of simulations to only 1,819, instead of
the 1 billion ADE brute force simulations across 5 worst case corners.
The accuracy of PVTMC Verifier matched well with running the Solido
High-Sigma Monte Carlo at each of the corners individually.
---- ---- ---- ---- ---- ---- ----
Our team uses Solido Variation Designer HSMC and PVTMC Verifier.
We use them for high-speed (50+ Gbps) and high-sensitivity (<10mV)
applications for our mixed-signal designs, composed of both analog and
digital circuits.
Through machine learning, the Solido tools let us estimate worst-case
corners without making overly pessimistic scenario.
- Regular Cadence Monte Carlo simulations cannot analyze non-
Gaussian tails beyond 5-sigma, as running 1+ M simulations
in ADE is not practical. But Solido HSMC can do the same
with <10K simulations.
- PVTMC Verifier helps us identify the worst-case corners quickly.
We still have some pessimism -- Mentor recommends that we use
PVTMC to identify the worst corners, and then run HSMC around it.
Solido can take any simulator and manage LSF distributed simulations --
this is a big plus for us. It also provides the capability to save the
models from any MC run and then run other simulations with the models.
That is also a big plus in analyzing critical results in detail.
We have been using Solido since 16nm. It continues to be important for
10nm, 7nm and below. We'd recommend both Solido PVTMC Verifier and
HSMC for any deep-submicron circuit validation.
---- ---- ---- ---- ---- ---- ----
Solido PVTMC Verifier lets us do fast exploration on different PVT
corners to get statistical meaningful results. Does it with ML.
We currently use it to sweep across corners to capture PVTs that need
attention at the early design stage.
---- ---- ---- ---- ---- ---- ----
We use Solido Variation Designer for variation analysis for our mixed
signal designs. Solido's biggest benefit is with machine learning
it's fast in exploring and converging the statistical space relative
to other tools like Cadence, SNPS, MunEDA.
In fact, it's 10x faster than other tools we've used. It's also very
accurate.
Variation Designer scales in the sense that that we can use it
meaningfully for full-chip simulation in a reasonable time.
It's able to solve open-ended problems. We are interested in where the
circuit fails, and it helps us identify outliers and statistical
corners, that we then re-simulate and explore in greater detail.
---- ---- ---- ---- ---- ---- ----
Solido Variation Designer makes our high sigma Monte Carlo simulation
time affordable and helps us to identify some weak design points.
For memory designers, it lets you assign different sigma values
to different circuit hierarchies, which is very useful for our SRAM
designs.
Variation Designer takes:
- Circuit netlist
- SPICE deck
- Variation device list
- Specification determined by measurements in the SPICE deck
- Searching direction/value
Then it uses its own machine learning algorithm to find the worst
samples based on the spec.
Solido generates:
- the simulation results,
- yield estimate,
- probability density function,
- sensitive analysis for the devices and device parameters
- convergence report
The user can choose the number of samples she/he wants to simulate. In
our designs, it usually takes under 20,000 simulations to cover over 30
billion samples. So, the speed up is about 10^6, or 1,000,000X.
Variation Designer provides a convergence diagram which shows the trend
of simulated samples. Still, we are not sure if Solido really finds the
worst case for some complicated cases. (We haven't run brute force MC
simulation since it is impossible. I believe all similar industry tools
currently available are having the same problem.)
I've had some exposure to these four different Solido Variation Designer
products. I'm most familiar with the first two:
1. High-Sigma Monte Carlo. It performs high sigma Monte Carlo
simulation by simulating a small portion of the samples.
2. Hierarchical Monte Carlo -- performs chip level Monte Carlo
verification. By specifying the design hierarchy and the
sensitive devices in each hierarchy, it assigns different
sigma values. We are using this in our SRAM verification flow.
It's very helpful. Normal high sigma Monte Carlo simulation
would lead to very conservative designs.
3. Fast PVT -- It helps identify the worst-case corner in a short
time. (I use it occasionally.)
4. PVTMC Verifier -- combines PVT corners & MC. We recently
started a trial with this, but it's too early for feedback.
The Variation Designer GUI is straight forward and clear. However, I
would suggest that Mentor provide a more comprehensive manual, as the
current manual doesn't contain enough details.
Overall, Solido Variation Designer is a good tool and I recommend it.
The Mentor AE is very helpful and easily reachable, and their R&D also
addresses our issues very promptly.
---- ---- ---- ---- ---- ---- ----
Solido High Sigma Monte Carlo (HSMC)
I used Solido HSMC For Monte Carlo analysis. My experience with it was
good. It's more powerful for high performance circuits -- and more
accurate. This year at DAC they talked about machine learning.
If I ever had questions or issues, I would just call my Mentor AE. He
would respond immediately and was very helpful.
---- ---- ---- ---- ---- ---- ----
Solido ML Characterization Generator helps in generating a .lib file.
Normally we do SPICE simulations to generate a .lib file. This very
time consuming as we must run several thousand transistor level
simulations for a single cell to characterize it against various slew,
load conditions at various PVT corners.
This MLChar tool kind of automates it, generating .lib files without
doing SPICE simulations. You provide it some .libs at regular PVTs,
and then using those .libs plus machine learning it generates a new
.lib for any required PVT.
The accuracy will not be as high as doing SPICE simulations but there is
a great time savings. I feel it could be used in initial design phases
when we need to check the design at any PVT but for final sign off it
may not give the required accuracy.
---- ---- ---- ---- ---- ---- ----
For us memory circuit designers, Solido Hierarchical MC was the best
of DAC. It lets designers simulate a complex circuit block with
different yield targets together.
Before we used their Hierarchical tool, we had to either:
- Simulate the blocks separately, which made it hard to draw a
conclusion on our overall memory design.
- Simulate the blocks together with same yield target, which
could be overly pessimistic or overly optimistic.
Solido's variation analysis greatly helps us do meaningful memory level
circuit analysis with all of our critical blocks combined, much like a
real-life case.
---- ---- ---- ---- ---- ---- ----
Solido helps us to identify and solve high sigma yield issues with very
few simulations.
This enables us to react fast on any problems and reduce our cycle time.
---- ---- ---- ---- ---- ---- ----
We use Solido Variation Designer for doing Monte Carlo simulations.
Normally we do 3-sigma simulations but Solido can do high (6) sigma
simulations also.
Normally with SPICE, many samples are generated and simulating all of
them takes a lot of time. Solido reduces the number of samples
drastically by putting intelligence in analyzing the Gaussian curve and
simulating only the required samples. They call this "machine learning",
but it was something Solido did before the marketing phrase was coined.)
This makes the simulation time quite fast compared to brute force MC
simulations.
Variation Designer has a bunch of features. I've used Cell Optimizer
extensively, which automatically decides the W/L of a transistor given
the specs it has to meet. For example, you can tell the delay and
rise fall requirements of an inverter and it will design the inverter
with the required W/L of transistors for you.
I like the tool. Several improvements still can be done on the tool,
and we are already working with Mentor on them.
---- ---- ---- ---- ---- ---- ----
Mentor-Solido PVTMC Verifier uses statistical analysis (and "machine
learning"?) to get a faster variation analysis of your design at various
sigma levels without having to run 1000s of brute force simulations.
We are definitely interested in doing an eval but haven't done it yet.
---- ---- ---- ---- ---- ---- ----
Solido PVTMC Verifier
My understanding is Solido uses advanced sampling techniques to help
designers get to the performance extremes of their design more
efficiently.
It takes fewer simulations and is more error proof than brute force
Monte Carlos and other SPICE level simulations where you look at your
PVT corners and what mismatch brings into it.
Based on our conversations at DAC and follow-up discussions so far with
Mentor, if it does what it says, it's a phenomenal tool.
- It helps designer to understand his circuit faster.
- It reduces errors, as designers might not recognize certain
aspects are prone to sensitivity.
Time will tell. We've worked with it a bit already, but it's still
too early to make a strong statement.
---- ---- ---- ---- ---- ---- ----
We use Solido's PVTMC Verifier. It's a high sigma Monte Carlo tool.
It speeds up our Monte Carlo simulations by letting us finish a large
pool of simulations using samples.
We plan to continue doing using it.
---- ---- ---- ---- ---- ---- ----
I got a demo from Mentor on the Solido machine learning (ML)
Characterization Analytics tool. It is used for finding issues in
.lib files. .lib is the liberty format from Synopsys for storing the
characterization information of standard cell libraries. While
characterizing the libraries, many issues can come up and .lib is a
very large file (.ccs Liberty files runs around in a few GBs).
This tool helps us understand the issues better by giving complete
picture of where the issue is and how it could be corrected. I liked it
because it will help in analyzing issues which would be quite difficult
to find otherwise, e.g. by manually checking the .lib file. Mostly
people just compile the .lib file and don't check for issues which this
tool can find.
---- ---- ---- ---- ---- ---- ----
Solido Variation Designer. Here is my assessment.
Pros
- Generates Monte Carlo samples for a target sigma and runs those
sample to build and verify a machine learning-based model.
- High-Sigma Monte Carlo runs at moderately fast speed.
- Hierarchical Monte Carlo is very helpful to simulate correlated
parts in different volume; this feature is not available in
most of the other EDA tools.
- The graphical interface is very user-friendly.
- Easy to debug simulation issues: Can pick any ordered sample
and re-simulate it, look at the waveform etc.
- Solido has world's best support team.
Cons
- For variation analysis (sigma) with varying design corners
(e.g. voltage), Solido does not produce a smooth curve. The
wiggle in curve comes from not properly targeting sigma for
the given corners. A non-model-building approach (For example,
say Silvaco VarMan which does not build an ML-based model but
uses ML to accelerate distribution tail finding) serves this
purpose better.
---- ---- ---- ---- ---- ---- ----
We use Solido Variation Designer almost exclusively for Monte-Carlo
simulations. Most of the time we use the fast Monte-Carlo option.
For high-sigma simulations, Solido's accuracy seems to be better than
Cadence ADE-XL MC environment. For parallel jobs, Solido's utilization
of farm servers (bsub) does not seem as efficient as ADE-XL -- it may
be limited by data post-processing.
---- ---- ---- ---- ---- ---- ----
Solido ML
---- ---- ---- ---- ---- ---- ----
using Solido
---- ---- ---- ---- ---- ---- ----
We like Solido
---- ---- ---- ---- ---- ---- ----
Solido
---- ---- ---- ---- ---- ---- ----
Related Articles
User buzz on Siemens/Solido machine learning is #1 for Best of 2018
CDNS Perspec is crushing it in the PSS Wars is #2 for Best of 2018
Breker TrekSoc is slipping in the PSS Wars is #2b for Best of 2018
Siemens/MENT InFact fails in the PSS Wars is #2c for Best of 2018
Again Spies hint Synopsys is making a PSS tool, but it's slideware
Join
Index
Next->Item
|
|
