( DAC'15 Item 4 ) ----------------------------------------------- [11/05/15]

Subject: Mentor BDA AnalogFastSpice and Solido were #4 tools at DAC'15

THE SPICE MUST FLOW: The reason why Apple, Qualcomm, Broadcom, TSMC, Intel,
Samsung, NXP, Avago, ST, GlobalFoundries, TI, and ARM all buy boatloads of
SPICE licenses is because they each have massive internal SPICE compute
farms to simulate and characterize all of their std cell, embedded memory,
analog/RF IP libraries.  Here's the math: 

  start with 1000's of std cell, mem, analog/RF elements (1,000's)
  TIMES number of specs per element (pwr, slew rate, gain, rise time)
  TIMES number of fabs they're using (TSMC, GF, Samsung, SMIC, Intel)
  TIMES number of processes per foundry (32nm, 28nm, 16nm, 14nm, 10nm)
  TIMES number of variants per process (LP, HP, ULP, HPM, HPC, HPL)
  TIMES number of PVT points (ff, 23C, 0.8 volt; ss, 40C, 1 volt; etc.)
  TIMES number of Monte Carlo points (3 sigma, 5 sigma, 6 sigma)

all multiplied together equals why the IDMs, fabless, and fabs all each buy
1,000's of SPICE licenses.  Now that the CDNS/BDA lawsuit is history, this
is why Ravi Subramanian is trapped in an aeroplane flying around the earth
selling BDA AFS licenses.
      
LOW VOLTAGE AND NODES: FinFET starts at 16/14nm and goes onto 10nm and 7nm.
Because of its fin structure and it's at smaller nodes, FinFET variation is
easily 20% to 50% higher than old fashioned planar transistors.  Add these
crazy super low voltages that mobile phones and IoT devices want -- plus the
new FD-SOI transistors -- and that's also why Amit Gupta is also flying
around the earth selling Solido Variation Designer licenses.

Two years ago at DAC'13 in Austin, for variation tools it was a 5-way battle
between Solido, MunEDA, ProPlus, Infiniscale, and Cadence.  Judging from the
user comments this year it looks like Solido now dominates with some minor
mention of MunEDA.

And while BDA "won" with many short user SPICE comments, Solido "won" as the
most interesting overall just due to how much each user wrote about Solido.

   SURVEY QUESTION #1:

      "What were the 3 or 4 most INTERESTING specific EDA tools
       you saw at DAC this year?  WHY did they interest you?"

        ----    ----    ----    ----    ----    ----    ----

    BDA AFS -- still good even after Wally bought it.

        ----    ----    ----    ----    ----    ----    ----

    We buy AFS licenses in bulk.

        ----    ----    ----    ----    ----    ----    ----

    BDA AFS

        ----    ----    ----    ----    ----    ----    ----

    BDA AFS and Cadence Spectre in ADE.  Same as last year.

        ----    ----    ----    ----    ----    ----    ----

    Wow!  BDA didn't get killed off at Mentor!

        ----    ----    ----    ----    ----    ----    ----

    BDA.  Ravi visits us too much to not give him recognition.

        ----    ----    ----    ----    ----    ----    ----

    We have server farms running 1,000's of AFS licenses.

        ----    ----    ----    ----    ----    ----    ----

    MENT AFS

        ----    ----    ----    ----    ----    ----    ----

    Wally was very smart to buy AFS

        ----    ----    ----    ----    ----    ----    ----

    Cadence Spectre-APS and Berkeley AFS.

        ----    ----    ----    ----    ----    ----    ----

    Cadence Spectre-XPS and Cadence Altos.  We do memory.

        ----    ----    ----    ----    ----    ----    ----

    Tom Beckley strikes out twice.

    Spectre is accurate -- yet not fast.
    Spectre-APS is fast -- yet not accurate.

    What makes up for it are unlimited CDNS tokens.

        ----    ----    ----    ----    ----    ----    ----

    AFS Mega.  fast SPICE for memories.  100 M elements.

        ----    ----    ----    ----    ----    ----    ----

    BDA ACE and Cadence ADE-L.

        ----    ----    ----    ----    ----    ----    ----

    With Silvaco back, it's time to look at SmartSpice again.

        ----    ----    ----    ----    ----    ----    ----

    Still use Magma FineSim.  Rajeev's legacy lives on.

        ----    ----    ----    ----    ----    ----    ----

    FineSim Pro

        ----    ----    ----    ----    ----    ----    ----

    Synopsys HSIM.  It works for what we do.

        ----    ----    ----    ----    ----    ----    ----

    ProPlus NanoSpice Giga because it does 100 million elements for
    SRAM, DRAM, FLASH.  Claims 16/14/10nm FinFET and 28nm FD-SOI.
    multi-threaded/multi-core

        ----    ----    ----    ----    ----    ----    ----
        ----    ----    ----    ----    ----    ----    ----
        ----    ----    ----    ----    ----    ----    ----

VARIATION & PVT TOOL COMMENTS

    We do large memories.  Solido is going to be in our design signoff.

    We needed variation in our high-sigma SPICE analysis, with a low
    runtime for running up to 10 billion samples on the Monte Carlo
    analysis of our memories.  Solido gave us that big speed up.

    - Only needs to simulate several thousand samples.

    - Still has accuracy of 100K brute force Monte Carlo simulation.  

    Solido analyzes the impact of particular devices in our circuits,
    highlighting the devices with the biggest impact in order.  This
    lets us focus on which  devices we need to optimize.

    Finally, Solido's bring-up time was very low.  Their GUI is good
    and it's easy for memory designers to use.

        ----    ----    ----    ----    ----    ----    ----

    We have a lot of variation in models from foundries, and tend to also
    push the devices to the limit.  We also have many repeated circuits
    that are especially sensitive to mismatches.  

    We wanted to supplement our traditional PVT and Monte Carlo with
    high-sigma Monte Carlo.  During our evaluation process we checked to
    see if Solido:

      - Could actually detect issues

      - Would be easy to use, for both the CAD people that set it up
        and also for the designers who would use it.  (We've looked
        at other tools and, in general, they are difficult to use.)

    Our results:

      - Set up: It took us only 1 day to get Variation Designer set up
        and running, including the Cadence Virtuoso integration.

      - Solido caught an issue: We sent a test circuit with a known
        issue to Solido and their software caught it right away.
 
      - Ease of use: Solido's tool was easy to use (which is actually 
        really important for designers.)

      - PVT - we are seeing a 1.5X runtime speed up.  Basically, we 
        run quick SPICE simulations and then drill down to specific
        corners.  You can zero in on potential issues a lot faster.

      - High-sigma designs: Solido usually takes under 1000 SPICE
        runs to converge.

    Solido has a new hierarchical Monte Carlo tool.  Recently evaluated
    it on a full memory array, with elements from 3 sigma (std circuits),
    5 sigma (sense amp), to 6+ sigma (bitcell).  What would have taken
    us billion's of simulations, took us ~10,000 simulations with Solido.

        ----    ----    ----    ----    ----    ----    ----

    I visited the Solido booth at DAC and since then have had a couple of
    sessions with their App Engineer to learn the tool.  I got to see
    first-hand what I had heard previously about the tool.  Ease of use,
    meaningful data plots and greatly reducing 1,000X Monte Carlo run times
    are their big plusses.

        ----    ----    ----    ----    ----    ----    ----

    We've been looking at Solido Variation Designer for std cell design;
    especially for multi-patterned FinFET devices.  Characterizing is a
    real pain there.  We're particularly interested in:

      - Reducing number of SPICE runs needed for Monte Carlo analysis

      - Combining PVT and statistical variation in our design coverage

      - Design sweeps for variation sensitivity

      - Design guard-banding reduction

    Solido Variation Designer is interesting because they could automate
    some steps for us.  Also it could scale, which is nice vs. manual.

        ----    ----    ----    ----    ----    ----    ----

    Solido Variation Designer: 

    It does a fast Monte Carlo and High Sigma Monte Carlo.  We've got to
    give them another look.  Low voltage variability is what draws us in.

        ----    ----    ----    ----    ----    ----    ----

    We picked Solido Variation Designer.  Since then we found:

      - Our cycle times have not significantly changed but robustness,
        quality and high sigma coverage have significantly improved

      - Our number of simulations dropped from 10K+ to 1,000 SPICE runs

    As for training, it only took about a day or so for each designer
    to start using the tool, and about a week to become proficient.
    They were able to learn Solido's tool while working on our next
    IP and immediately help designs already in our pipeline.

        ----    ----    ----    ----    ----    ----    ----

    We are taking a look at Solido Variation Designer.  

    Their speed improvements for Monte Carlo simulations and these
    circuit analysis are interesting.  (I haven't used it yet.)

        ----    ----    ----    ----    ----    ----    ----

    Solido Variation Designer

    The way Solido does Monte Carlo analysis can really help us reduce
    iteration.

    We want to look further into it and get more data from our team.

        ----    ----    ----    ----    ----    ----    ----

    Solido is powerful for Monte Carlo, corner case, and yield 
    analysis.  Friendly GUI and useful data reports.

        ----    ----    ----    ----    ----    ----    ----

    I'd heard about Solido for some time, but never quite knew what they
    did.  I stopped by their DAC booth.  Their engineers were willing to
    spend time to explain how Variation Designer worked.  Seems to me it
    could be useful for both variation aware and lib design.  

        ----    ----    ----    ----    ----    ----    ----

    We use Solido for fast MC on cells/macros designs and for library
    characterization of LVF.

        ----    ----    ----    ----    ----    ----    ----

    I do not have hands-on experience with Solido Variation Designer but
    was impressed by the methodology they have to reduce simulations.  

      - Fewer SPICE runs needed the same signoff ==> engineering time
        and computing time is saved.

      - IPs are signed off before they hit silicon ==> no need for a 2nd
        spin which saves time cycle and a huge amount of money.

      - Allows better optimization of IPs ==> area/time saved.

    The memory design world needs such tools.

        ----    ----    ----    ----    ----    ----    ----

    MunEDA Wicked

    We don't trust the relative sample error in Solido's HSMC.
    Out CTO wants us to do WCD instead.  He says it's tried and
    true.

        ----    ----    ----    ----    ----    ----    ----

    MunEDA WicKeD & HSIM

        ----    ----    ----    ----    ----    ----    ----

    Looked at Solido.  Our Cadence contacts say that their ADE-XL WCD
    is technically better.

        ----    ----    ----    ----    ----    ----    ----

Related Articles

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    The secret untold backstory of why BDA went with Mentor Graphics

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