> Now the tea leave reading comes on specific tools. This is where I
> ratio the "best" votes with the "worst" votes to see if there's any
> news. ... The "cash cow" tools (Design Compiler, PrimeTime, PhysOpt,
> VCS) all have ratios ranging between 3-to-1 and 10-to-1. Avanti Astro
> has a 2-to-1. I guess Synopsys, Inc. will retain it's No. 1 position
> in EDA revenues in the forseeable future.
>
> - from http://www.deepchip.com/items/snug04-02.html
From: Jan Willis [ VP of Cadence Corporate Marketing ]
Hi, John,
You might want to retract your statement: "I guess Synopsys will retain
it's No. 1 position in EDA revenues in the foreseeable future." That was
a future of about a week! We're not going around beating our chests,
rather we're staying very focused at Cadence on winning the hearts and
minds of our customers through the best technology, integration and open
collaboration.
- Jan Willis
Cadence Design Systems San Jose, CA
Editor's Note: Why is it whenever I say anything financial I get burned?
I'm a techonerd, not a financial nerd. My congrats to Cadence. - John
( ESNUG 432 Subjects ) ------------------------------------------ [08/25/04]
Item 1: ( SNUG 04 #7 ) Mentor Rep says use the latest MBIST Architect
Item 2: Boston SNUG now has Synopsys R&D Birds-of-a-Feather Panels
Item 3: Free Admission to Magma User Group Events if you are Unemployed
Item 4: Huh?! 64-bit Formality Runs SLOWER on Linux vs. Solaris Boxes??!
Item 5: User Needs Help DC Synthesizing & PrimeTime Analyzing Odd Design
Item 6: ( ESNUG 431 #6 ) Magma Rebutts the Broadcom Review of Blast Fusion
Item 7: Using PrimeTime-SI, PhysOpt, and Astro to Address Crosstalk Delay
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
============================================================================
Trying to figure out a Synopsys bug? Want to hear how 17,088 other users
dealt with it? Then join the E-Mail Synopsys Users Group (ESNUG)!
!!! "It's not a BUG, 
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
|
