Editor's Note: When I ran into Aart at last week's SNUG conference, he
wanted a chance to answer the questions from ESNUG 423 that were asked
of the CEOs at the DVcon CEO panel. He wanted to share the Synopsys
perspective on the issues raised. So when I got home, I went through
ESNUG 423, clipped 17 of the user questions, and emailed them to Aart.
Here are the questions and his replies.
- John Cooley
the ESNUG guy
( ESNUG 425 Subjects ) ------------------------------------------ [03/24/04]
Item 1: ( ESNUG 423 #1 ) Aart on Paying $430 Million for MoSys
Item 2: ( ESNUG 423 #2 ) Aart on U.S. Jobs Going to India & China
Item 3: ( ESNUG 423 #4 ) Aart on FPGAs & Structured ASICs
Item 4: ( ESNUG 423 #6 ) Aart on AMD Opteron vs. Intel Itanium 2 Linux
Item 5: ( ESNUG 423 #8 ) Aart on Magma Market Share & Cadence Open Access
Item 6: ( ESNUG 423 #10 ) Aart on Behavioral Compiler End-of-Life
Item 7: ( ESNUG 423 #10 ) Aart on SystemC, System Verilog, Vera, VCS
Item 8: ( ESNUG 423 #12 ) Aart on 90 nm Design Issues
Item 9: ( ESNUG 423 #14 ) Aart on Assertion Languages
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
============================================================================
Trying to figure out a Synopsys bug? Want to hear how 17,088 other users
dealt with it? Then join the E-Mail Synopsys Users Group (ESNUG)!
!!! "It's not a BUG, jcooley@TheWorld.com
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
|
|
