( DAC'17 Item 6 ) ------------------------------------------------- [02/21/18]
Subject: Real Intent trounces Synopsys Atrenta as the #6 "Best of" for 2017
REAL INTENT MOVING UP: last year because Aart raised the prices of Spyglass
by ~3X, it gave an opening for Real Intent's Prakash Narain to pounce on.
The funny thing is because of cheaper pricing, all Prakash had to do was
simply *match* Spyglass functionality and quality -- and then he was in!
What's wilder is... hmmm... how to say this diplomatically... while Aart is
"distracted" away from boring old EDA by sexier new not-EDA software areas
to move Synopsys into -- like in November 2017, when Aart dropped a hefty
$565 million to buy $75 million revenue (a 7.5X multiple!) cybersecurity
firm "Black Duck Software"...
... Prakash stepped up his Real Intent linting/CDC/RDC/formal R&D and
support -- and it's given Prakash an even bigger piece of what used to
be the *exclusive* Spyglass RTL analysis pie.
And what's even more wilder is Prakash is now gaining ground in adjacencies
like Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) -- where
before he was just one of the pack. How do I know this? The users yarped
up about his Meridian CDC & RDC and his Verix CDC -- but not one user cited
their competitors as a "Best of" for 2017.
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BLUE PEARL MISSING THIS YEAR: Last year for the "Best of" tools, the FPGA
designers chatted up using Blue Pearl for FPGA linting and CDC.
This year, not one user -- no FPGA nor ASIC engineer -- bothered to mention
Blue Pearl as a "Best of". (I don't know what's up with that.)
"There is only one thing in life worse than being talked about,
and that is not being talked about."
- Oscar Wilde, Irish playwrite (1854 - 1900)
QUESTION ASKED:
Q: "What were the 3 or 4 most INTERESTING specific EDA tools
you've seen this year? WHY did they interest you?"
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REAL INTENT ASCENT LINT
With the Spyglass price increase, we're looking hard at Ascent Lint
as a cost cutting substitution.
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We're using Prakash lint now.
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Real Intent Ascent Lint
Ascent Lint analyzes a design and reports instances of potential
simulation-synthesis mismatch, ambiguous coding styles, common pitfalls,
and code that is likely to be misinterpreted or break other EDA tools.
Other linters do this, e.g. we've looked at Synopsys/Atrenta SpyGlass
also.
But execution is key, and Real Intent has better execution.
1. Real Intent's rules/checks are easily understandable.
2. Real Intent is significantly better in terms of noise
reduction.
- Ascent Lint has very few false positives vs SpyGlass.
- With SpyGlass, you must turn off some of the rules to make
it manageable, especially the noisy ones. Real Intent
takes pride in making sure their rules are usable, so you
can turn on more rules and get fewer false positives. We
found several bugs in the design that were missed by
Spyglass.
3. AE support and R&D at Real Intent are outstanding. Our design
uses a lot of complex coding structures, and a few bugs in the
Ascent tool were discovered. But the technical team was able to
squash the bugs very quickly, often in 24-48 hours.
Ascent Lint's debug user experience is fantastic. Over the years, I've
come to expect very little from EDA tool UI's, but Real Intent's iDebug
is sufficiently minimalistic and functional to get the job done without
getting in the way or wasting my time.
A nice touch is their emacs integration--when you double-click on a
warning or error in the lint tool, it can open the file in emacs
annotated with the error and presents an interface within the editor
to generate a waiver or pragma, if desired.
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Ascent Lint -- RTL linting
Ascent Lint is a high-performance linter. It is low noise -- for
example, it doesn't have duplicate reporting.
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Ascent Lint. Much cheaper and it works just as good.
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RI Lint catches my early mistakes quite well.
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Ascent.
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Spyglass and Ascent work equally well.
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We get better/faster support from Real Intent and from Synopsys,
so we heavily lean toward Ascent.
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When Ascent found some CDC problems with our design, Real Intent
tried to upsell us on their new Verix tool.
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REAL INTENT MERIDIAN VERIX CDC
Real Intent Meridian Verix
We are using Verix for a specific reason.
First, we're longtime user of Meridian and find it to be a very capable
CDC tool. We've been using it for block-level RTL CDC verifications.
We want to verify larger designs above the block level. The interfaces
are more interesting (vulnerable to CDC problems) between blocks, and
verifying larger pieces of the chip at once means fewer setups that we
need to create.
In this larger scope of verification, we also want to use more complex
sign-off constraints (from STA), and more complex clocking structures in
the design. Basically, we want to model and constrain the design for
CDC in a way close to the way we sign it off.
This is where Verix comes in. Unlike Meridian, it lets us use complex
constraints and clocking structures.
We've worked closely with Real Intent to develop this, and they've come
up with a substantially more sophisticated CDC tools that can verify our
chips in a more realistic way.
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Real Intent Verix CDC
Verix CDC Multi-Mode Signoff combines static timing principals & CDC
functional analysis.
The capability of reading/using multi-mode SDC (design constraints) of
STA for running CDC in multi-mode elevates Verix CDC to a sign-off tool.
- Usually the setup to run CDC takes significant user time and
effort. One single setup for multi-mode CDC definitely saves
time/effort, comparing with multiple setup for run CDC in
different modes.
- We are using Spyglass CDC, and it takes a while for our
designers to set up and clean up all noise messages in running
CDC for every mode.
One common report for multi-mode CDC would prevent the duplication of
common errors (CDC violations) across multiple modes, hence this saves
the user's time to debug the common CDC violations in each mode.
All the above are major factors for us to consider bringing Verix CDC in
for an evaluation.
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Real Intent Meridian CDC
Meridian CDC is a clock domain crossing tool with
- Very fast performance
- Low noise reporting, grouping the results into categories
- A command-line interface for fully customizable sign-off
methodology.
Real Intent claims gigabyte capacity, but our current chip is not very
large, so we have not yet tested that.
We'd like to see Real Intent improve their debug UI usability, as
defining waivers takes a lot of clicks, plus you must click them in a
certain order or it can change your results; i.e. you have to come up
a learning curve to do it right. (This a usability issue rather than
a bug as it can be used, but reduces productivity.)
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We're not sure about what's so different between Meridian CDC and
Verix CDC.
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Good scoop on the Verix story, John! (See ESNUG 574 #2.)
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We like the low noise with Meridian CDC. I hope Prakash doesn't
mess up and unintentially make Verix noisy. New tools can do
that.
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How we rank the CDC tools:
1. Real Intent Meridian CDC
2. Excellicon ConDor
3. Ausdia TimeVision CDC
4. Spyglass CDC
5. Questa CDC
We're unsure about Real Intent Verix until we get a chance to try it.
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REAL INTENT MERIDIAN VERIX RDC
Meridian RDC
I spent time talking to Real Intent about their Meridian Reset Domain
Crossing tool.
Meridian RDC helps when you are trying to figure out that the resets in
your system are connected properly, such as synch and asynchronous.
It catches bugs such as meta-stability problems.
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Real Intent Meridian RDC
Meridian RDC -- static analysis ensure signals crossing reset domains
function reliably.
We don't have a commercial tool for RDC analysis. Meridian RDC's
capability to extract resets and reset domains automatically is very
useful.
The capability to run RDC analysis on blocks, IPs, subsystems, or
full-chip levels would definitely be beneficial to design teams whose
members work on different blocks and subsystems.
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My boss wants me to do a deep dive into the RDC tools.
Right now Real Intent is the most real looking one.
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How are CDC tools different from RDC tools?
To me they seem very simular.
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REAL INTENT ASCENT AUTOFORMAL
We did a first look at AutoFormal at DAC.
I'll tell you later if it's worth an eval.
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Real Intent Ascent AutoFormal
Ascent AutoFormal performs a preliminary formal analysis of your design,
not unlike Mentor Graphics' AutoCheck.
It performs sequential formal checks to ensure that the design behaves
as it was intended.
Some areas it reports on are FSM properties, unique/priority case
statements, dead code, constant nets, clocking and reset properties,
and X assignment.
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AutoFormal is still early stage. Not beta, but not ready replace
any rival tool yet.
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We're early AutoFormal users. Looks promising.
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PRAKASH, THE TROUBLEMAKER: Not in the user "Best of" survey, but here are
the user's reactions to the tech fight Prakash had with Anirudh about
DAC'17 Troublemakers Panel in Austin, TX
whether designers need quick low-noise static linters vs. doing full Jasper
formal on their design blocks. On a personal note, a number of people
(including myself) were surprised by Prakash being so uncharacteristically
outspoken on the panel. It's not like him.
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We thought Prakash was great both on stage and with his tools.
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It's nice to see Prakash finally breaking out of his shell and
speaking up.
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The best part of this DAC was when Anirudh and Prakash went at it.
Normally Prakash is fairly reserved. It was wild to see him open up
on Anirudh.
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Go, Prakash, go!
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Prakash was right. There's no way Jasper can do 500 M CDC.
It has to be done in linting.
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I don't see either Real Intent linting going away, nor Jasper
formal going away. They do different functions at different
points in the verification process. Both men are wrong.
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Jasper do 500 million gates? What's Anirudh been smoking?
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The size issue is what kills Anirudh's hopes of using Jasper
on large blocks.
When he can run on 500 million gates, that's when Prakash is
in trouble.
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Anirudh does have a point. It would be nice to see the entire
verification task done with one easy flow. But the reality
has always been you need outside 3rd party tools to do full
testing.
Going all CNDS or all SNPS sounds good to our Purchasing Dept,
but we're running the risk of missing functional bugs if we do.
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Truth! Cadence Superlint is Supernoisy!
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Prakash v Anirudh!
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Jasper can't solve CDC tools anywhere near like how a dedicated
CDC tool like Meridian can.
Jasper is like a hammer and seeing everything as a nail.
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We like Anirudh's roadmap that he's commiting to on record there.
He's pushing Jasper in the right direction as far as we're concerned.
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I respect Anirudh for being on the Cooley panel and taking the
Real Intent heat.
No Synopsys Atrenta guy has the balls to do that.
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Didn't expect to see Prakesh take on Jasper there.
He normally competes against Spyglass doesn't he?
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SYNOPSYS ATRENTA SPYGLASS
We're a Spyglass house because we got it in a bundled deal. My
engineers all like it because Spyglass is what they're used to.
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Because of the Spyglass price increase, we're now benchmarking
the far cheaper Real Intent tools against it.
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Spyglass.
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We found that RI Ascent to be less noisy than Spyglass.
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Spyglass is exceptionally good. I've used it for 10+ years.
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We're hearing good things about Real Intent.
If Logan [the SVP of Synopsys Sales] doesn't give us a deep
discount on Spyglass, we'll most likely switch.
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Aart seems very focused on recouping the entire $150 million
he paid for Atrenta.
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Related Articles
One user's quickie eval of Real Intent AutoFormal and Ascent Lint
Prakash and Anirudh spar on Real Intent Linting vs. Jasper Formal
Real Intent and Blue Pearl get #2 overall for Best EDA of 2016
Real Intent caught launching a "true" CDC linter under old name
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