( ESNUG 574 Item 2 ) -------------------------------------------- [06/13/17]
Subject: Real Intent caught launching a "true" CDC linter under old name
Real Intent Meridian CDC does billion-gate hierarchical verification;
iDebug hierarchical intent analysis and data manager with scope-
based reporting for clock-domain crossing errors. Meridian Physical
CDC has additional glitch and illegal-logic checks for CDC errors
in gate-level netlists. Has new faster static engines this year.
(booth 527) Ask Vikas Sachdeva. Freebie: a rose
Ausdia Timevision-CDC does block/fullchip CDC analysis on RTL or
gates using SDC constraints only -- so it can verify your actual
clock groups as being CDC-safe. Chips of 20 M to 500 M inst with
1000 clocks in 8 hours. GUI user interface with full tracing.
(booth 1119) Ask for Sam Appleton. Freebie: plush armadillo
NEW! -- Excellicon ConDor does CDC claiming "NO setup, fastest run
times on 500M+ insts, flat. Only RTL or netlist input for multi-mode
hierarchical analysis." (booth 1213) Ask Himanshu Bhatnagar.
- John Cooley's Cheesy Must See List for DAC'16
From: [ John Cooley at DeepChip.com ]
I yawned when my sources told me that Real Intent will be announcing an
"exciting big new multi-mode CDC linter" at DAC'17 in Austin next week.
Excellicon went into CDC by announcing ConDor multi-mode CDC at DAC'16.
And Ausdia announced TimeVision CDC even earlier in 2013. On top of
that, Real Intent already has had its own Meridian CDC for some years now...
So I quickly phoned Prakash Narain, CEO of Real Intent, about this so-called
"big" (and what I really thought was actually empty) announcement.
I was blunt.
"Everyone has had CDC tools for years now. How is this one any different?"
Prakash replied that his tool now did "true" multi-mode CDC analysis...
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BACKGROUND: The unspoken secret behind all of these "multi-mode CDC" linting
tools is EDA vendors using loopholes to make this marketing claim. In the
end there always some sort of gotcha that you don't discover until later.
For example, Synopsys Spyglass CDC and Mentor Questa CDC recommend either a
1.) single worst-case CDC setup (as if that is easy)
or
2.) doing multiple single-mode CDC runs
and then they both do consolidated reports to claim multi-mode CDC.
A Spyglass CDC takes around 10 hours to run 50 million gates and Questa can
take ~12 hours for the same size designs. Running complete CDC analysis on
just 3 modes will 3X the run time for both. Doing 5 modes is 5X the time.
Doing 7 modes is 7X the run time... (the runs can be parallelized, but you
get the idea.)
Meridian CDC also recommends single-mode setup and can run a 50 million
gates design in ~3 hours.
These three CDC tools also do further analysis to distinguish between safe
and unsafe clock crossings.
For Excellicon and Ausdia, their multi-mode setup is automated by supporting
SDC multi-mode commands, but I'm told their CDC analysis is limited to just
listing the CDC crossings. A listing of all crossings can also be obtained
from PrimeTime. A 50 M gate design can easily have 750,000 clock crossings.
Without detailed CDC analysis analysis of safe and unsafe crossings, the
user is left with a huge debug burden.
---- ---- ---- ---- ---- ---- ----
WHY PRAKASH IS BRAGGING: The "big claim" that Prakash is making at this DAC
is his new CDC linter does "true" multi-mode CDC. Claims a complete CDC
analysis on 50 Million gates design in less than 3.5 hours. (Compared to
the single-mode Spyglass 10 hours and Questa 12 hours, that's a big brag!)
You get the full multi-mode safe and unsafe CDC results in one unified
analysis and with no duplication of results.
Naturally, Prakash also claims this isn't just "DAC fluff", and he already
has a "big customer" that is using his multi-mode tool -- but Prakash
doesn't have permission to release that customer company name yet...
(Gosh it's not like I've ever had an EDA vendor tell me *that* line before!)
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OOPS: And I laughed when I asked Prakash what his new "true" CDC linter tool
was named. "... it's the first tool in our new Verix family of products..."
A whopping 17 years ago, Real Intent had launched at DAC'00 its "new" Verix
"... claiming a breakthrough approach to logic verification with
its Intent-Driven Verification methodology, startup Real Intent
this week will unveil Verix, its first tool offering. ... it reads
Verilog RTL code, deciphers the designer's intent and automatically
checks for eight types of violations..."
- from Richard Goering, EE Times (05/08/2000)
Prakash is trying to pull a Back To The Future on us -- by trying to reuse
the name of his very, very, veeeeery first product from 17 years ago -- and
then rebranding it as his "new" "true" Verix CDC linter of 2017. D'oh!
- John Cooley
DeepChip.com Holliston, MA
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Related Articles:
Real Intent and Blue Pearl get #2 overall for Best EDA of 2016
User benchmarks Fishtail, Ausdia, Atrenta, Excellicon, Blue Pearl
User on why he switched from Atrenta to RealIntent for lint/CDC/X
What Real Intent missed in its CDC/SDC/constraints/linting survey
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