( ESNUG 590 Item 03 ) --------------------------------------------- [03/26/21]
Subject: Reader snarkies to Cooley's report on Palladium/Veloce/Zebu boxes
Editor's Note: Almost every time I publish, readers send me these
concise replys that are sometimes insightful, but are more often
cynical -- which is why I call them "snarkies". Enjoy. - John
There it was. Their own public admission, SNPS HW sales peaked in CY2019.
Time to dig through the analysts reports to see if they confirmed this.
"... we've inferred [SNPS] hardware revenues of more than $70 million,
up over 30% year/year and up over $15 million from 3Q20 (perhaps
including some incremental demand from its largest customer); if correct,
this would imply FY20 HW revenues of about $220 million, down slightly."
- Jay Vleeschhouwer, Griffin Securities Synopsys Report, Q4 FY2020
"Verification HW, was very strong in 4Q, but down slightly y/y for F20."
- Rich Valera, Needham & Co. Synopsys Report, Q4 FY2020
- Cooley's 2021 report on Palladium/Veloce/Zebu HW boxes
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You picked the right two analysts to quote on this.
Both Jay and Rich know EDA inside and out.
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Jay gives detailed numbers, and his analysis is good.
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I'll bet that your best info came from Jay's reports.
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Why didn't you quote my own research?
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I call Rich Valera the Condenser. He can take a complicated set
of data and render it to a few well chosen words like a pro.
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Couldn't you have gotten a more recent pic of Jay?
He looks like Mr. Brady of the Brady Bunch in that pic.
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I made a killing off of Jay's advice to buy AVNT back in 1999.
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The exceptional "2x speed-up" and "double the capacity" gains only happen
when a totally new custom processor chip is introduced -- which is why
whomever has the newest chip at the new node takes ~80% of the emulation
sales following 24 to 36 months after the new chip is released. The 2nd
new chip at the same mode grabs ~60% in backlash sales after its launch.
A new uP chip -- especially at a new node -- is the difference between
riding a racehorse and driving a Lamborghini in the Monaco Grand Prix.
Yesterday's technology was great for yesterday's emulation/acceleration,
but it's not enough for emulating/accelerating today's chips.
- Cooley's 2021 report on Palladium/Veloce/Zebu HW boxes
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Excellent analysis. You should call it Cooley's Emulation Law.
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It's just like PC's. It's always been about the fasted processors.
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Spot on. SW updates are window dressing compared to HW gains.
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Good job.
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No surprise here. This mimics the Intel vs. AMD story.
The new processor dominates new sales.
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Good article.
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Yup. The emulation market parallels the PC market.
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The newest node always rules.
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Why those 60% backlash sales? That doesn't make sense!
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Those 2nd new chip sales are because a 2nd new chip is cheap to make.
Cheap chips make Veloces cheaper than Palladiums for the same job.
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A 28nm CDNS uP in 2015 costs a lot more to fab than a 28nm MENT uP does
three years later in 2018. The 60% "backlash" sales are bargan hunting
customers buying drastically lower priced Veloce boxes.
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I'll bet the 60% backlash sales are based on relationship.
The Mentor Veloce sales guys are slick.
They could sell ice cubes to eskimos.
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I find it surprising that the new node takes 80% of the new sales.
Shouldn't it be 95% instead?
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Why would any competitive systems house buy an old node uP emulator
once a new node is out?
I doubt your 20% remainder.
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This isn't rocket science to any hardware designer.
The newest node is always king.
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Good article.
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You did your homework there.
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But take the same data and annualize it came up with:
Showing a clear trend of CDNS HW (11.6% CAGR) outpacing SNPS HW (1.6% CAGR)
by a 10.0% CAGR.
Then I remembered Anirudh became president of Cadence in 2017 -- making
this an accidental report card on Anirudh's HW performance.
My congrats go to Anirudh.
- Cooley's 2021 report on Palladium/Veloce/Zebu HW boxes
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This is why Anirudh makes the big bucks.
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This isn't Anirudh *doing* anything.
It's the many layers of staff under him who's doing all the work.
Anirudh's job is to pick the right people and hope they don't %$%$ up.
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I used to get pissed when a company's fat cats would get credit
for the work that their worker-peasants did until I worked in
a few companies with dysfunctional management.
My congrats go to Anirudh, too.
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Hellava lot better than the Mike Fister years, I tell you.
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I pray my 401k makes a 12% CAGR this year. The DJIA is too high.
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A new uP chip -- especially at a new node -- is the difference between
riding a racehorse and driving a Lamborghini in the Monaco Grand Prix.
- Cooley's 2021 report on Palladium/Veloce/Zebu HW boxes
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I always enjoy and appreciate your analysis, but boy did you mess up
bad in your most recent post!
Anybody who follows Formula 1 knows that the Monaco Grand Prix is
a Formula 1 event, and Lamborghini doesn't race in Formula 1. A
better analogy would be comparing a racehorse to a Ferrari (the car
company who has been competing in F1 the longest), although Mercedes
has been unbeatable for the past several years.
(I guess they have a new chip. 8-)
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Lamborghini NEVER races in the Monaco Grand Prix.
But since you're obviously American, you wouldn't know this.
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It's Ferrari in the Monaco Grand Prix. Not Lamborghini.
Didn't they make a movie showing Ferraris in the Grand Prix?
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I'm just glad you referenced a Grand Prix. Most Americans know
absolutely nothing about racing beyond NASCAR and the Indy 500.
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Come to China.
I'll take you to the Shanghai International Circuit.
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How do you know that's a racehorse and not a horse doing dressage?
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And ironically, the only continual loser here is Synopsys -- because Zebu
and HAPS hardware is tied to whatever Xilinx decides to sell. Aart's ZeBu
boxes use Xilinx FPGAs as their emulation processor; and his HAPS boxes use
either Xilinx or Altera FPGAs as their processor. Problem is Intel bought
out Altera (and Altera has languished since); and AMD just acquired Xilinx
(promising that Xilinx might languish, too, if AMD wants Xilinx for focus
on the I/O-speed-at-all-costs Server market instead of the Big Ass Capacity
FPGA For Emulation/Prototyping/Acceleration market.)
Search for "CapEx on data center investment" and you'll see it's around
$137 billion -- while Emulation CapEx is around $750 million -- so it's
not all that difficult to see where AMD will direct Xilinx R&D to go.
- Cooley's 2021 report on Palladium/Veloce/Zebu HW boxes
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I left Altera right before Intel bought us. From what my buddies tell
me, "languished" in a gross understatement.
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Intel bought us in 2014 to lock in their 14nm 3D Tri-Gate sales.
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Oh, so you too noticed nothing big has come out since the Stratix 10?
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Insightful analysis on how AMD should direct Xilinx R&D.
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CapEx is a nice yet misleading proxy on high end FPGA market sales.
Start with your fact that the entire EDA HW market is $750 million.
1/3 for Synopsys share: $250 million
40% is margin, leaving: $150 million
50% is PCB and SW costs: $75 million
50% is FPGA chip costs: $75 million
You're right, John. You just didn't have the right numbers. Having
Xilinx R&D pursue a $75 million TAM is stupid when a $14 billion TAM
in FPGA sales to the Server market is right there.
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I have no doubts that AMD management will manage Xilinx with the
exact same skills and accumen that Intel management did with Altera.
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Check out Achronix shipping $100M in "Test and Measurement" FPGAs to
Intel -- a big Synopsys customer.
Maybe Intel is building internal emulation hardware and saving $$$?
Synopsys HW has underperformed at Intel over last 2 to 3 years,
and this might explain the whodunnit!
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Clever analysis. Aart's ZeBu and HAPS are in trouble.
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There are 3 possible futures to look out for.
- If Cadence announces a NEW chip while Mentor is still on their OLD
chip -- Happy Anirudh, Sad Ravi, and Sad Aart.
- If Mentor announces a NEW chip while Cadence is still on their OLD
chip -- Sad Anirudh, Happy Ravi, and Sad Aart.
- If *both* Mentor announces a NEW chip and Cadence announces a NEW
chip -- Happy Anirudh, Happy Ravi, and Sad Aart.
The only constant in all these EDA HW box futures is "Sad Aart".
- Cooley's 2021 report on Palladium/Veloce/Zebu HW boxes
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I did not tell you this.
You will have a Happy Anirudh and a Happy Ravi within 30 days.
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Watch for that third option. It may happen sooner than you think.
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From your own see-saw chart, Anirudh will have a new chip at
a lower node this year and Ravi's folks aren't due until 2024.
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Happy Ravi is coming next week!
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==* Spoiler Alert! *==
Both Cadence and Mentor are launching new chips next month.
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My Synopsys guys tell me to ignore Cooley.
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Related Articles:
An accidental report card on Anirudh's HW accelerators/emulators
Sawicki and Anirudh on Veloce2, Crystal 3, Palladium Z1, Zebu4
CDNS Protium crazy fast "Palladium-compiles" #1a for Best of 2019
SCOOP -- will the new MENT Veloce Crystal 3 chip crush Palladium?
Jean-Marie warns Synopsys Zebu needs 9X more "warm bodies" to run
A surly Jean-Marie sasses Cadence Palladium and Synopsys EVE Zebu
Frank on Lauro missed Palladium job throughput 3X faster vs. Zebu
The 14 metrics - plus their gotchas - used to select an emulator
MENT bigwigs say Veloce 2 will pass CDNS Palladium by end-of-2012
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