Editor's Note: Right in the middle of New England's Fall foliage season & I
get a contract that puts me 3000 miles away in Silicon Valley! Aaargh!
Got some fun though. I met up with Aart De Geus (the CEO of Synopsys)
and told him that we had named the two new goats at my farm "Aart" and
"Harvey". (Harvey Jones is the Chairman of Synopsys's Board.) At first
he paused with a smirk on his face. He then replied: "I don't know whether
to be honored or insulted." (I guess it's not every day that one hears
that they have a goat named after themselves.) He thought a bit more and
added with an even bigger grin: "I can't wait to tell Harvey that you've
named a goat after him, though!"
- John Cooley
the ESNUG guy
( ESNUG 199 Item 1 ) ---------------------------------------------- [10/94]
From: mga@Synopsys.COM (Michael Albrecht) & vito@synopsys.com (Vito Mazzarino)
Subject: (ESNUG 196 #6 198 #1) "Hotline Refuses To Help Via E-mail"
John,
In reality, the engineers at the Synopsys Support Center prefer the use of
email when resolving issues because:
1. Correspondence is self-documenting
2. Initial questions & responses are typically better thought out & presented
3. Testcases can be appended easily to email (in contrast to live calls)
4. Engineers can investigate issues and respond when information is available
rather than holding customers on-line (via phone) while the investigation
is conducted
Currently, 15% of our issues are initiated and resolved via email and for the
above the reasons we would like to take this opportunity to encourage its use
when working with the Support Center.
When contacting the Support Center via email, please feel free to use the
following template as it will allow us to more quickly characterize and respond
to your issue (section in parentheses indicate information we need from you):
LOGID: (XXXXX or NEW)
PRODUCT: (Design Compiler, VSS, Test Compiler, etc.)
VERSION: (3.0c, 3.1a, 3.1b, etc.)
NAME:
COMPANY NAME:
PHONE NUMBER:
SITE ID: (NUMBER)
PROBLEM DESCRIPTION:
TOOL OUTPUT: (ERROR MESSAGES, ETC. WHERE APPLICABLE)
TEST CASE: (WHERE APPLICABLE)
Please note that if your issue has already been encountered (Defects, Tool
Usage Issues, etc.) it can be found in SovIt (solvit@synopsys.com). If you
have tried SovIt please indicate this in your email so that the Applications
Engineer can make sure the solution is entered into the SovIt System.
- Michael Albrecht and Vito Mazzarino
Synopsys Support Center Managers
( ESNUG 199 Item 2 ) ---------------------------------------------- [10/94]
From: john@Synopsys.COM (John Miles)
Subject: (ESNUG Post 196#0 198#2) "How Did SNUG Europe Go?"
John,
Here's the numbers for this last SNUG Europe.
This year SNUG Europe in Grenoble ran for two half-days attracting 126
non-Synopsys participants. The main interactive sessions ran on Tuesday
afternoon with a social event in the evening. Tutorials continued on
Wednesday morning. Beginning with the most common attendee comments:
What was liked most:
* Exchanging information with other users
* Real experiences reported
* User presentations
* Tutorials
* Variety and choice in program
* Opportunity to talk to Synopsys technical people
What was liked least:
* Location in Grenoble
* Distance and lack of transport from Alpexpo
* Lack of space and seating in meeting rooms in Hotel
* Difficulty in changing session
* Transport to and from SNUG party
* Only one tutorial included in binder
* No SVP material in the binder
Overall Assessment of the Event:
6% Excellent
68% Very Good
21% Satisfactory
3% Fair
1% Poor
No one individual session stood out as highly excellent or dismally poor. All
the sessions followed a distribution very close to the overall result above.
Should SNUG Europe be held alongside EURO-DAC 1995 in Brighton, England or
should it stand alone?
75% Alongside Euro-DAC 25% Stand Alone
How long should the meeting be?
45% 1/2 day + evening + 1/2 day
28% Full day + evening
13% 1/2 day + evening + Full day
8% Full day + evening + Full day
6% 1/2 day + evening
Would you like to see a Semiconductor partner track next year?
78% Yes 22% No
What is your job function?
47% Designer
21% CAD / Support
14% Other
10% Library Support
8% System Admin.
Finally, may I quote the conclusions of Roddy Urquhart, SNUG Europe Chair,
from his Synopsys internal report on the survey results:
"The biggest area for improvement for 1995 will be in logistics.
Logistics were much simpler in Hamburg than Grenoble because of
the close proximity of hotel and Exhibition areas, good public
transport and good hotel meeting rooms."
The clear message to put SNUG Europe in the same week as EURO-DAC. The most
common request was to keep the program free of overlaps with EURO-VHDL; to do
this would require meeting on Monday or Friday which would not be popular.
There was a strong desire to mix and match sessions and if anything there
was disappointment with the lack of repeated sessions. This suggested that
there was a strong program on offer but too little possibility of covering
the sessions desired. Since interaction with Synopsys people was really
valued, perhaps we should plan an FAE/CAE led discussion in every session
to allow this sort of exchange".
- John Miles
(Organisor of SNUG Europe and EURO-DAC 94 for Synopsys and
Vendor's Chair on the EURO-DAC 1994 Steering Committee)
Synopsys Design and Consulting, UK
( ESNUG 199 Item 3 ) ---------------------------------------------- [10/94]
From: kamphuis@targon.hl.siemens.de (Peter Kamphuis)
Subject: Cache Problems After Having Evaluated DesignWare Modules
John,
I just found a solution to a problem we had and I though it might be
interesting for other Synopsys users to know.
One of our users let Design Compiler V3.1b crash because of a known bug
described in STAR-20683 (synthetic_library = {}). Just before crashing
there was a hint to set synlib_evaluation_mode = true. So the user did
and tried to recompile his VHDL design containing an addition. But now he
got a limited design, where he couldn't look into the adder module! (The
adder was supposed to be a carry look-ahead adder.)
I told him to reset synlib_evaluation_mode to false and to set
synthetic_library = {dw01.sldb} or to obtain the Designware-Basic license
before compiling, as it was described in STAR-20683 (obtained from
SolvIt.)
We compiled his design again -- and funny enough Design Compiler checked out
the SynLib-Eval key (no variables were set for this anymore). The design
got limited again, we couldn't look into the carry look-ahead adder
although this one isn't licensed at all.
I found out that after deleting the previous created parts from the cache
everything worked fine. Somehow Design Compiler stores the evaluation mode
information into the cache for unlicensed modules also (because of
STAR-20683 ?). The next time, when reading from the cache during a non-
evaluation run, Design Compiler sees that the module/implementation needs
an evaluation key and your design gets limited. This information in the
cache is wrong.
Take care! This is problably some kind of bug. I reported it to Synopsys.
- Peter Kamphuis
Siemens Semiconductor Group, Munich
( ESNUG 199 Item 4 ) ---------------------------------------------- [10/94]
From: arthur@wrksys.enet.dec.com (Edward S. Arthur - Alpha Personal Systems)
Subject: Silly dc_shell/Environment Variable Question
Hi, I can't seem to find the answer to this question in any of the docs or
on-line help... v3.0c of dc_shell...
I have a script in which I want to:
sh ls -l netlist.v | Mail -s \"Netlist-completed\" $USER
I want to mail to $USER instead of "designer" since we do not always
have this variable set from user to user. $USER does not work, I can't
seem to get access to Unix environment variables or get them into a
dc_shell variable. Can it be done?
- Ed Arthur
Digital Equipment Corp.
( ESNUG 199 Item 5 ) ---------------------------------------------- [10/94]
From: myhui@thlayli.newport-beach.ca.us (Michael M.Y. Hui)
Subject: (ESNUG 196 #2 197 #3 198 #4) "Synopsys Announcing DesignPower"
>To increase your chances of getting things right, remember to use asynchronous
>stimulus (i.e. not all of the signals of a data bus arrive at the same time.)
This may be exactly why an analytical (static) rather than an empirical
(dynamic) power analyzer is needed: you *want* to hit the circuit with just
the right timing so that the power spike is at its maximum. Any other
scenarios are not as interesting.
- Michael M.Y. Hui
Rockwell International
( ESNUG 199 Item 6 ) ---------------------------------------------- [10/94]
From: jtran@ATVL.Research.Panasonic.COM (Jimmy Tran)
Subject: Is 1993 VHDL Syntax FULLY Supported in VSS?
Hi John,
Can anyone help me with these questions ? I've been waiting for about a week
for a response from Synopsys and still waiting ?!!
Question 1:
Does Synopsys ver 3.1b fully support 1993 syntax VHDL ? (YES/NO) If NOT
fully supported, then WHAT other syntax should I be aware of?
Question 2:
Do I have to code using only 1987 syntax to be on the safe side ? (YES/NO)
I received some error messages when I used 1993 syntax for file reading;
clarifying these two questions would help a lot.
- Jimmy Tran
Panasonic
[ Editor's Note: Users please limit your responses here to SYNTHESIZABLE
VHDL -- I don't want another comp.lang.vhdl here in ESNUG with volumous
posts exploring every corner of the LRM. - John ]
( ESNUG 199 Item 7 ) ---------------------------------------------- [10/94]
From: mr@symbionics.co.uk (Martin Ryder)
Subject: Any experience of Synopsys -> Lattice ?
Hi John.
Has anyone had any experience of using the Synopsys tools (straight DC Pro,
and/or FPGA Compiler) targetting Lattice devices?
e.g. quality of results via DC Pro - or is the FPGA compiler a must?
can you write out in "TT2" (whatever that is)?
success/horror stories etc etc
The question has come up because we're looking at Lattice as a possibility,
but we'd like to know the gotchas presented on ESNUG first. Thanks in advance.
- Martin Ryder
Symbionics Ltd.
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