( DAC'19 Item 1c ) ------------------------------------------------ [12/19/19]

Subject: MENT Veloce Strato, Virtual Lab, Hycon makes #1c for Best of 2019

SLOW YEAR FOR VELOCE: If you look at this year's comments the number of users 
(and word count) citing Veloce or Strato as one of the "most INTERESTING
tools this year" is very, very weak compared to the Protium and Palladium
user comments.

I wrote up in detail of how this compared with Mentor's prior killer 3 year
run of users *perceiving* that Veloce was better than Palladium.

    CDNS Palladium wins back user mindshare is #1b as the Best of 2019

That 3 year run is over.  It appears Palladium/Protium is the leader now.
     
And this is a "neutral" or "recharge" year for Veloce and Strato as far as
user mindshare is concerned.

SCOOP: I do like that this user survey found Hycon, an unannounced MENT tool
that's a "configurable platform for Android and Linux that runs on Veloce."
I tried to search for it in the Mentor.com web site -- but nothing comes up!

        ----    ----    ----    ----    ----    ----    ----
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      QUESTION ASKED:

        Q: "What were the 3 or 4 most INTERESTING specific EDA tools
            you've seen this year?  WHY did they interest you?"

        ----    ----    ----    ----    ----    ----    ----

    Mentor's Veloce and how it has helped us verify our IP.

    We are using Veloce to boot and run our SW applications.  Our chip on
    a Veloce is ~200 million gates.  During the bring-up, we found a bug
    with which would have been extremely challenging to root-cause without
    Veloce tools.

    Veloce's compile-time, fast and complete debug, and virtual stuff
    helping us verify our chip and SW to meet tight schedules.

    We have been using Veloce for our embedded FPGAs and we are now moving
    our inference to Mentor's emulation platform, too.

    We plan to look into power-performance measurement by running some
    standard benchmarks like ML perf and others.

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    I've been in this industry for 20 years, and in the past I've heard of
    chip design companies using an emulator for ASIC bring-up at a very low
    scale.  

    In fact, the company where I worked before purchased emulator box from
    a giant EDA tool company for a very high price tag.

    Though this unnamed emulator box was primarily targeted for network
    ASIC bring-up, it didn't work out very well for the team due to the
    complexity in building infrastructure for efficient use of the box.
    Yes, it eventually enabled couple of our SW Engineers to develop our
    drivers, but it turned out to be a colossal failure due to its poor
    performance, high maintenance, and other logicstics.

    My company decided to sell the box at a cheap price to recoup the loss.

    With not so great experience on emulation, I joined a new company a few
    years ago, and my first assignment there was to look at MentorG's Veloce
    emulator.  I was very skeptical about it, and doubted if I made the
    right choice joining a project involving it.

    Now, if I'm asked, I would say the Veloce emulator is one of the best
    tools that I've worked on.  And though it may not replace SW simulators
    for functional verification -- Veloce is an ideal choice for *fast*
    fullchip and system verification of multi-million gates ASIC.

    The way Veloce is architected is mind boggling, and I would give a big
    thumbs up to MentorG for building such a complex system, and enabling
    the customers with the push button concept to map single ASICs into
    multiple FPGA-like Crystal2 custom processors.

    If MentorG provided only emulator H/W, and let the customers build all
    the external modules as part of infrastructure, it would end-up with
    another colossal failure, but their virtual solutions for PCIe, network
    topologies(1G to several 100G), DDRs, CPU and the peripherals came as
    a big plus for their Veloce.

    Combining HW and virtual solutions with their easy to use tool commands
    enabled us to build the required infrastructure very quickly in Veloce.
    It opened up ASIC fullchip and even system bring-up for multiple of
    our ASICs in parallel.

    Veloce enabled our ASIC HW team, plus opened-up opportunities for our
    diags and SW team to develop and validate their code from our Verilog
    RTL running on Veloce before silicon arrives.

    This is a big left shift in the entire product development.

    We are overwhelmed with the Veloce performance, capacity, ease of use,
    and its knowledgeable AppEngineers support.

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    Veloce Strato: The emulator has helped us build systems with multiple
                   ASICS for testing.  This is a must have because
                   simulating system builds is un-usably slow.

   Veloce Virtual Lab: Uses Virtual Ethernet for traffic generation and
                       Virtual PCIE for bringing up system level software.

   Mentor Hycon: A hybrid configurable platform for Android and Linux
                 that runs on Veloce.  I haven't used this personally
                 but it's interesting and it has good potential uses.

       ----    ----    ----    ----    ----    ----    ----

    We're very interested in Hycon.

       ----    ----    ----    ----    ----    ----    ----

    1. Strato Veloce Virtual Ethernet
    2. Questa CoverCheck
    3. Ansys PowerArtist

       ----    ----    ----    ----    ----    ----    ----

    I've used the Questa simulation for many years.  This year I started
    using this along with Visualizer on simulation front.  It's really
    helped to open/view and navigate through the complete waveform
    database.

    Earlier I had issues in opening waveforms in Questa, but with their
    Visualizer tool, this has been improved very much.

    We also started using Veloce for running complex IC simulation and
    for developer SW bring up.  Veloce has helped reduce our verification
    cycle that used to be much longer in typical sim env.

    Along with triggers, and save & restore of database, Veloce helped
    us capture failing cases.  We like its debug and MENT shortened the
    database download time. Overall Veloce reduced our verification cycle,
    and helped our SW bring-up finish ahead of schedule.

    We are also in an eval of the Veloce Strato emulator for our upcoming
    projects.  We love their support in getting the system up and running,
    especially Vikas Singhal, their Strato AE.  He has been supporting us
    even on holidays.  He's very prompt and technically sharp.

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    Started a Veloce Strato vs. Palladium Z1 eval this week.

    Too early to say which will win.  I'll let you know later.

       ----    ----    ----    ----    ----    ----    ----

    Strato

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Related Articles

    CDNS Protium crazy fast "Palladium-compiles" #1a for Best of 2019
    CDNS Palladium wins back user mindshare is #1b as the Best of 2019
    MENT Veloce Strato, Virtual Lab, Hycon makes #1c for Best of 2019
    SNPS Zebu Intel shipments slipping 2 quarters is #1d Best of 2019

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