( ESNUG 422 Item 2 ) -------------------------------------------- [02/19/04]

Subject: ( DAC 03 #39 ) A Detailed Review Of NeoLinear NeoCircuit 2.0.6

> I have seen the NeoCircuit demo, and gone to a half-day workshop on
> their "RAD" flow.  I have also seen a demo of ADA's tools.  Both ADA and
> NeoLinear have intelligent ways for you to set up constraints for device
> sizing of an analog circuit topology.  Since I haven't run the two tools
> on a test design, I cannot say whether one or the other does a better
> job converging on an optimized solution.  This would be an important
> thing to do if you were choosing one of the two tools.  If one tool
> consistently found a good solution in fewer iterations (and therefore a
> shorter time) that would be strongly in its favor.
>
>     - from http://www.deepchip.com/items/dac03-39.html


From: Jean-Philippe Dieusaert <jean-philippe.dieusaert=user  domain=st spot calm>

Hi, John,

I did an eval of NeoLinear's NeoCircuit 2.0.6 in June.  Since then,
NeoLinear provided a new release that is quite improved compared with
2.0.6.  We are only starting to use release 2.2.7 now so I cannot make
any comment on it yet.  I can comment release 2.0.6 only.
   
NeoCircuit 2.0.6 Strengths:
   
  - Easy to use. Don't need a long training to use it.
   
  - A junior designer can use the tool to size the circuit (with the
    help of an expert designer)
   
  - Sizing can be done on multiple CPUs during the night (when the
  - simulation licenses are normally not used)
   
  - Robustness: does not crash. The tool is stable
   
  - Gives good results in sizing with a reasonable time ... if your
    constraints are correctly defined (see 1st weak point below).
   
  - Really useful for resizing after migration from 1 technology to
    another one.
   
  - Also useful in case of simulation models update
   
  - Automatic HTML datasheet generation of the sized circuit is very
    useful
   
  - Automatic back-annotation of the solution into the schematic
   
  - Integrated inside Opus
   
  - If everything is correctly defined, you are sure the tool checked
    every simulation.  As opposed to doing it manually, where you always
    could forget to check one simulation after an update of your
    schematic
   
  - It allows you to see the bottleneck of your design : where
    NeoCircuit is stuck
   
  - It could be nice to recheck the topology of your design to improve
    it during sizing
   
  - It allows matching between devices
   
  - It can be used to minimize of maximize some goals : you have an
    already good manual solution, but it can be that the tool finds a
    better solution than you.
   
  - Allows you to measure only some parameters (no sizing, just
    measuring)
   
  - Can be used with several different simulators
   
  - Expression toolbox is very useful or reuse of .extract in Eldo
    possible
      

NeoCircuit 2.0.6 Weaknesses:
   
  - The more you use the tool, the more you get experienced with it ...
    I mean that you start to learn some tricks that are never mentioned
    in the training.  And these tricks are quite important to obtaining
    good results with the tool.
   
  - If you start to know how the tool reacts, you can define your
    constraints more easily to achieve the results you want to have.
   
  - In 2.0.6, you can sometimes have some strange results (that will
    not happen anymore once you gain expertise). E.g.
   
      1) If you make 2 same runs, you can sometimes get a different
         solution.
      2) If you make 1 run with certain variable range, you get a
         solution ... and if you increase your variable range, the
         previous solution you found may not be found anymore (while it
         should as you relax your constraints)
      3) If you found a solution that was much better than the goal
         you wanted to have, if you make a 2nd run with a goal value to
         reach just a little bit smaller that the solution found, the
         tool may not found the solution anymore, while the solution
         exists as it found it just in the previous run.
   
  - No corner integration in 2.0.6, nor any good methodology to use
    corner analysis with the tool. You have to recheck the results out
    of the tool, yourself, to check the corners.  This seems to be
    improved in 2.2.7 ... but need to be checked. I'm worried about the
    simulation time
   
  - Error messages are not understandable ... seems improved in 2.2.7.
   
  - The setup of the constraints takes some time.
   
  - Sometimes you need to make several runs to tune your constraints in
    order to find a solution.
   
  - No visibility of what the tool is doing during its sizing (seems to
    be improved in 2.2.7) except with the "compare" function.
   
  - Doesn't work with a version of Eldo below 5.4 (which is often used
    for old DesignKit at ST)
   
  - If you want to make your sizing in parallel: it uses a lot of CPU
    and simulation licenses.
   
  - After having defined your goals and variable ranges, afterwards it
    is not possible to classify them. The only order for displaying
    them is the entry order.
   
  - Can sometimes give different results if you run a stand alone
    simulation on the backannotated schematic with the found solution.
    Mainly with Eldo and .extract using a formula (GBW, PM, ...)
   
  - Need to know up front for your technology the allowed values for
    your variable ranges.  Because your CDF callbacks in Cadence are not
    triggered until you back-annotate, you can throw your solution away
    if you gave a too big variable range for 1 parameter that is now
    out of the allowed technology rate.
   
    But the latest release still need to be checked because I've seen the
    improvements and they seem very good.

   
Conclusion:
   
NeoCircuit (2.0.6 !!) can be a valuable tool in optimizing, migration of
technology, and simulation model update.
   
There is added value in term of time gain, a better solution, a junior
designer can do the sizing, compared with a manual sizing, and the tool
was quite good and gave us better results in a reasonable time.
   
    - Jean-Philippe Dieusaert
      ST Microelectronics                        Zaventem, Belgium
   

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