Subject: FedEx, McDonald's, and the Mentor C-synthesis Blue Book contest
As I opened the door of my house to go meet some friends at a local Chinese
restaurant for lunch, there was a FedEx guy was unexpectedly standing there
directly in front of me.
"Are you John Cooley?", he asked.
"Uh... Yes.", I replied.
"This is for you." He handed me a package, turned and walked briskly back
to his truck. Since it was from Mentor Graphics and it wasn't ticking, I
figured it was safe to open. Inside was a copy of their new Blue Book that
they've been yarping about so much lately. It's to teach you how to write
C source for C-to-Verilog-RTL synthesis.
I pawed through it quickly. "Lots of code examples. Lots of pics. Good.
Looks like light reading. I should probably give it a read.", I thought
to myself at the time.
I threw it in my car, drove to lunch, and completely forgot about it.
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Time passes...
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I'm driving by myself to Vermont. I stop at McDonald's for a quick bite to
eat. Looking in my car for something to read during dinner, I find the
Blue Book. "Why not? It has pics. Looks simple enough."
What I read:
PREFACE: "blah blah blah the author is a real engineer blah blah
blah Hitachi and Thales Aerospace use this blah blah"
TABLE OF CONTENTS: Lots of common sense HW design details. Cool!
CHAPTER 1: "blah blah Mentor CatapultC Marketing Pitch Here blah"
CHAPTER 2: "blah use makefiles, use testbenches, use headers blah"
CHAPTER 3: For C++ HW design, you need a bit-accurate data type.
SystemC is OK as a bit-accurate data type, but it is too
slow during simulation run time. Mentor's AC_datatypes
class lib is a bit-accurate data type that sims fast.
CHAPTER 4: data flow graphs, loops, scheduling, resource
allocation, latency, throughput, initiation intervals
Lots of pics and code examples -- much better than the Behavioral Compiler
training that I did at Synopsys some 10,000 lifetimes ago.
I finished my Big Mac and continued driving to Vermont.
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A little more time passes...
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Long story short, Mentor shanghaied me into being a guinea pig for their
upcoming "Test Your C-IQ" multiple-guess contest.
The first version of the quiz was bad. I stopped after 11 minutes because
of so many Mentor CatC-is-GREAT Marketing questions in it. I was disgusted
and let them know it.
Second version was 11 questions that took 14 minutes. Got a 78% score on
that. It still had two Marketing CatC-is-GREAT Marketing questions.
Eventually they FINALLY cut the marketing Q's, so it's now a quick 4 minute
true ENGINEERING ONLY test for C-based design with only 5 questions. Check
it out:
http://www.surveymonkey.com/s/RDCZSSR
Everyone who takes the quiz is entered into a drawing for 40 Blue Books,
plus the top scorers are put in a drawing for an iPod Touch 4.
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Over time, the Blue Book kept me coming back. What I've later read:
CHAPTER 5: I/O scheduling, conditional vs unconditional, Ready/ACK/wait,
stalling/flushing pipelines, read, arrays mapped to memories
CHAPTER 6: sequential and combinational hardware, shift registers,
Log2Ceil, MUXes, LFSR, barrel shifters, adder trees,
Lookup Tables
CHAPTER 7: memory architectures, interleaving, single and
dual port RAMs, 1-D data streams, 2-D windowing
CHAPTER 8: hierarchical design, arrays shared between blocks,
passing control variables between blocks, control I/O,
latency between blocks, reconvergence, deadlock,
pipeline flushing, FIFO's
I have yet to read the following, but I skimmed:
CHAPTER 9: ac_channel stuff, non-blocking reads, arbitration
Chapters 10 and 11 appear to be swimming with FIR filters, FFT's, etc.
With all the pics and code examples, the Blue Book was a good first intro
to C-to-RTL synthesis for me. I'm glad I got a copy of it. At least now
I understand ~50% of what the C synth guys say. Before it was under 5%!
- John Cooley
DeepChip.com Holliston, MA
FULL DISCLOSURE: This is paid coverage of an EDA promotion. Yea,
it was fun, but I got paid to write this. And it was for a promo
only. I never do paid coverage nor paid endorsements of ANY EDA
TOOLS NOR COMPANIES. (See Q7, Q8, Q9 here for an explaination.)
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