In his keynote address, Wally Rhines talks about scan, ATPG, BIST,
test pattern ordering, cost of test, Janusz Rajski, don't cares,
coverage, at speed, stuck at, compression, transition and bridging
faults, cycles-per-test vs. tests-per-cycle, 70% of design is test,
design reuse, power, multiple clocks, server farms, GRID, brute
force, FPGA prototyping, emulation, assertions, late designs, RTL
simulators, intelligent testbenches, constrained random, dynamic
formal, TLM, abstractions and his Q&A follow-up.
See http://www.deepchip.com/videos/wally08.fhtml
After viewing his keynote, feel free to send your reactions. - John
P.S. No registration, no sign up, my videos are now for all to see!
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