The Wiretap Intercept No. 070209
opinions and skeptical speculations too small to fit into an Industry Gadfly column

>  What are edgy questions I can ask these guys at the DVcon Troublemakers
>  panel on Thursday, Feb. 22nd?


From: Are Arseth <aaarseth=user domain=atmel not calm>

Hi, John,

Please ask all the panelists about multithreading.

My CPU servers are not getting any faster per CPU core, they just get more
cores.  However all my EDA tools only have basic multithreading support.  So
although my designs get more complex and I have plenty of free CPU power
it's all going to waste because EDA vendors dont have the guts to implement
multithreaded algorithms.

Design Compiler does not support multithreading at all. Physical Compiler
only supports it in coarse placement, which is a tiny part of the total
runtime. IC Compiler only supports coarse place and routing.  Nano Encounter
same only routing.  PrimeTime only supports this in multimode multiscenario
and then it's not multithreading, it's just automated parallel sessions.
Formality supports some kind of automated parallell sessions, but only in
verify (not in match) and even in verify most of the job is done by 1 CPU
and only trivial tasks are farmed out to slave CPUs.

So in summary how are the vendors prepared to meet the multi-core world
with real multithreaded implementations?

    - Are Arseth
      Atmel                                      Trondheim, Norway

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