> SNAPSHOT VIEW -- Some of these comments were written before Synplicity and
> LSI Logic pulled out of the Structured ASIC business -- the rest were
> after.  You can actually watch the train wreck as it is actually happening
> in the customer quotes!  What's also interesting is how the Magma SA users
> are dedicated to Structured ASICs no matter what.  (I'm not sure, but I
> think NEC and Altera are still in the Structured ASIC game.)
>
>     - from http://www.deepchip.com/items/else06-12.html


From: Clive Maxfield <max=user domain=techbites caught balm>

Hi John,

I don't care what everyone is saying, the folks at TSMC and UMC are NOT
building every digital IC on the planet.  Furthermore, although std-cell
ASICs dominate one "end" of the market and high-end FPGAs are amazingly
cool at the other end, there still is another player: Structured ASICs.
As far as I'm concerned, the gloom-and-doom reports about their imminent
demise have been greatly exaggerated.

Of course, the real "downer" for the proponents of Structured ASICs came
earlier this year when LSI Logic killed their RapidChip product line (which
they referred to as "Platform ASICs") and dropped out of the market.  Truth
to tell, this was a bit of a surprise, because LSI had been promoting the
socks out of these little rascals right up to the end, but obviously the
technology just wasn't working for them business-wise.

And, of course, another blow came when those who don the undergarments of
authority and stride the corridors of power at Synplicity decided to halt
work on their Structured ASIC-related synthesis products.  Personally I
think this was a real shame, because they have some killer technology in
this area.  I obviously can't speak for the folks at Synplicity, but I
think that they simply decided that the time wasn't ripe -- they aren't a
huge company and they'd devoted a lot of time and effort to supporting
LSI Logic, so I'm guessing they said to themselves: "Why should we spend
precious resources on something whose time has not quite arrived when we
can pick the low-hanging fruit in FPGA synthesis which we dominate?"

The problem is that the above are just two "happenings" -- this does not
mean that there isn't a role and a market for Structured ASICs.  All it
means is that their time to bloom hasn't quite arrived, but it's coming;
oh yes, it's coming.  And, in the meantime, there are still lots of
applications for which Structured ASICs are a good fit, and which will
keep the remaining players rolling along until the good times come.

As an aside, I keep thinking about SanDisk (who used to be called SunDisk
until they decided they didn't want to be confused with Sun Microsystems).
Way back in the mists of time (circa the end of the 1980s) SanDisk's
founders had a vision that there was going to be a huge market for NAND
flash-based memory products (in many ways they defined the market).  They
developed their technology and -- waited and -- waited and -- almost
nobody came to the party.  But SanDisk held on and persevered, selling into
different markets, until the consumer-space exploded with digital cameras,
portable MP3 players, USB "memory sticks" (how did we EVER live with out
those?), and -- the list goes on.  Look at SanDisk now!  They're making
billions a year.  I bet they need a fleet of trucks running 24/7 to haul
the money down to the bank.  (If only I had shares.)

But I digress.  For Structured ASICs today, we still have a couple of big
foundries who offer them: Fujitsu and NEC.  These fabs love Structured ASICS
because when you are starting up a new technology node, one thing you love
to do is to make the same wafer over and over again while fine-tuning the
process.  Structured ASICs are great for this sort of thing.

             

Another interesting area is that of prototyping ASICs using FPGAs.  There
are a couple of big players in this area.  First we have Altera with their
HardCopy offering.  Altera are the only FPGA vendor with a 100% internal
FPGA-to-Structured-ASIC path.  This has stood them well in many markets;
for example, they've taken a leadership position (and now have the biggest 
market share amongst the FPGA vendors) in the WiMAX arena.  Part of this is
due to their ability to quickly and easily convert FPGA prototypes into
more cost-effective HardCopy Structured ASICs for large-scale deployment.
In fact, I believe that HardCopy now accounts for around 5% of Altera's
bottom line, which is nothing to be sneezed at, let me tell you.

Another big player in FPGA-to-ASIC conversion is AMI Semiconductor (AMIS).
Unlike Altera, who are only interested in working with their own FPGAs,
AMIS will happily work with almost any FPGA technology.  One of their claims
is that, in addition to migrating the logical (functional) portion of your
design, AMIS will also create a device that is pin- and package-compatible
with the original FPGA.

Next are the Structured ASIC vendors who target mid-range production runs;
that is, a production run for which FPGAs are too slow, power-hungry, and
expensive, but for which a standard cell ASIC would cost way too much to
develop.  There are a number of players in this arena, such as AMIS, ChipX
(which used to be known as Chip Express), eASIC, and Faraday Technology.
The great thing about Structured ASICs is that everyone has a completely
different way of doing things.  For example, eASIC's offering is based on
FPGA-like SRAM-based lookup tables (LUTs) for the logic coupled with
Structured ASIC metallization (routing).

As opposed to selling structured ASIC devices themselves, some folks prefer
to provide Structured ASIC fabric in the form of intellectual property (IP).
I think they call this "Configurable SoCs."  In this case, they provide
Structured ASIC fabric that you either use as the basis for (or incorporate
into) your SoC design.  The two main players here are Lightspeed Logic
(which used to be known as Lightspeed Semiconductor) and ViASIC.  They were
based on proprietary logic cells.  Although these cells may offer some speed
and density advantages, they also have some major drawbacks.  For example,
moving your technology to a new fab is a painful process.  Also, whenever a
fab introduces a new technology node, these cells have to be re-implemented
from the ground up, which is time-consuming and expensive.  It is for this
reason that folks like Lightspeed and ViASIC have introduced new offerings
based on cells from the foundry's standard libraries.  Using standard lib
cells allows their Structured ASIC vendors to leverage all of the work
performed by the fab in qualifying the new process, thereby dramatically
increasing the availability of their fabrics.

Last but not least, the folks at Triad Semiconductor offer a rather cunning
mixed-signal (analog and digital) Structured ASIC solution that can be the
"bees knees" for certain applications.

So what's the bottom line?

There are always going to be designs, John, that demand the utmost in
performance and the minimum in power consumption.  In this case, standard
cell ASICs rule, but these little rapscallions are becoming harder and
harder to design.  ASICs consume huge amounts of engineering resources,
require a wide range of folks (like your ESNUG readers) with different
expert skills, cost a fortune to produce, and take so long to design,
verify, and build that they stand a good chance of missing their market
window.  Things are bad enough at the 90 nm and 65 nm.  The 45 nm node is
going to make your eyes water.  The 32 nm and 22 nm nodes are going to
separate the men from the boys.  This is where I think the concepts of a
Structured ASIC fabric implemented in standard cell chip using a standard
metal architecture are going to come into their own.

Or to paraphrase Monty Python, "Structured ASICs are not dead yet!"

    - Clive Maxfield
      Techbites.com                              Huntsville, AL