!!!     "It's not a BUG,                         
  /o o\  /  it's a FEATURE!"                              (508) 429-4357
 (  >  )
  \ - /                  Everything Else EDA Census:
  _] [_                           - or -
              347 Engineers Review 2005-2006's Crop of EDA Tools

                              by John Cooley
           Moderator Of The E-mail Synopsys Users Group (ESNUG)

    "Anecdotally, Magma's tools sound like they are killing Synopsys and
     Cadence tools in evaluations.  If they survive the lawsuit they will
     probably be a force to be reckoned with."

        - John Weiland of Intrinsix Corp. in ELSE 06 #19

( ELSE 06 Subjects ) --------------------------------------------- [06/23/06]

 Item  1: What the?  What happened to the DAC Trip Report?
 Item  2: Mathworks Matlab & Simulink, Elanix, Xilinx Accelchip, CoWare SPW
 Item  3: Target Compiler Checkers/Chess, Critical Blue
 Item  4: Denali Blueprint
 Item  5: Mentor Nucleus, Wind River VxWorks, Green Hills, ARM Realview
 Item  6: Forte Cynthesizer
 Item  7: Mentor Catapult C
 Item  8: Synfora Pico, Celoxica Handel-C, Carbon DesignPlayer, Summit
 Item  8: Bluespec
 Item 10: Synplicity Synplify Pro and Synplify DSP
 Item 11: Synplicity Identify and Premier (Amplify)
 Item 12: ViASIC ViaPath/ViaMask, LSI RapidChip, Altera Hardcopy, Magma SA
 Item 13: Mentor Precision vs. Leonardo Spectrum
 Item 14: Xilinx Webpack, Altera Quartus II, Actel Libero
 Item 15: Synopsys DC-FPGA
 Item 16: Fishtail Focus/Refocus vs. Blue Pearl
 Item 17: Mentor Calibre DRC/LVS
 Item 18: Magma Mojave Quartz DRC/LVS
 Item 19: Magma Blast Fusion, -Rail, -Plan Pro, -ATPG, -DFT, -Power
 Item 20: Magma Statistical Timing Analysis, Blade Technology, SiliconSmart
 Item 21: Sierra Pinnacle
 Item 22: ClearShape InShape
 Item 23: Calibre DFM, Aprio, KLA-Tencor, Nannor, ChipMD, LogicVision
 Item 24: Mentor Calibre MDP, Xyalis, Brion Technologies
 Item 25: Prolific vs. Zenasis
 Item 26: Gradient FireBolt
 Item 27: Xpedion GoldenGate, AWR, Cadence Spectre RF, Ansoft

( ELSE 06 Jobs Section ) ----------------------------------------- [06/23/06]

   Job 1: Santa Clara, CA - Athena Design seeks an EDA R&D developer
   Job 2: Framingham, MA - Dafca seeks a senior applications engineer 
   Job 3: Los Altos, CA - True Circuits seeks a circuit design engineer 

============================================================================
 Trying to figure out a Synopsys bug?  Want to hear how 21,788 other users
    dealt with it?  Then join the E-Mail Synopsys Users Group (ESNUG)!
 
     !!!     "It's not a BUG,               
    /o o\  /  it's a FEATURE!"                 (508) 429-4357
   (  >  )
    \ - /     - John Cooley, EDA & ASIC Design Consultant in Synopsys,
    _] [_         Verilog, VHDL and numerous Design Methodologies.

    Holliston Poor Farm, P.O. Box 6222, Holliston, MA  01746-6222
  Legal Disclaimer: "As always, anything said here is only opinion."
 The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com

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   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)