"Biggest lie? Denali thanked me for coming to their DAC party.
Either somebody lied or Denali was confused. With travel budgets
as they are, I've not set foot in the US for a few years now."
- David Talbot of Aptina (UK) Limited
( DAC 09 Subjects ) --------------------------------------------- [12/11/09]
Item 1: Oasys RealTime Designer vs. Synopsys DC-Topo
Item 2: Mentor Catapult C
Item 3: Forte Cynthesizer, Calypto SLEC, AutoESL
Item 4: Mentor Olympus-Calibre and AtopTech Aprisia
Item 5: Nusym Denibulator, Breker Trek, Jasper, RealIntent
Item 6: Apache RedHawk/Totem/Sentinel and Sequence PowerArtist
Item 7: Magma Talus/Vortex/Titan/Quartz/Hydra/FineSim
Item 8: Extreme GoldTime and Tiempo
Item 9: Tanner EDA
Item 10: TSMC OIP IPL iPDK iDRC iLVS
Item 11: Silicon Frontline, Orora Arana, Analog Rails
Item 12: IC Manage, Cliosoft, and MethodICs
Item 13: Biggest lies told at DAC
Item 14: Rumors heard around DAC
( DAC 09 Other Stuff ) ------------------------------------------ [12/11/09]
Tech 1: Catapult Primers: C synthesis and reducing verification
http://www.deepchip.com/look/see091119-01.html
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/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
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