Editor's Note: I'm suddenly now "mommy" to 3 wild orphaned baby skunks
that live under the wood pile by my front door. (A car killed the real
skunk mom.) They're silly cute beasties; little 5 inch long bodies
with 4 more inches of tail. And quite wild. At night, which is when
they're active, you have to find them in the dark, leave some cat food
near them -- and then you quickly/quietly flee! Don't do it that way
and the neighbor's cats scarf a free meal while the babies go hungry.
I've never raised skunks before, so I'm sort of winging it. All I know
these 3 pups aren't going to die. Not on my watch. When you least
expect it, God plays a practical joke on you. I'm a "skunk mommy" now.
- John Cooley
ESNUG/DeepChip.com
( ESNUG 465 Subjects ) ------------------------------------------ [06/28/07]
Item 1: Cadence closed the "open source initiative" testbuilder.net? Huh?
Item 2: ( ESNUG 464 #4 ) Yup, Formality side files are nothing but trouble
Item 3: ( ESNUG 464 #4 ) Questioning the 40 missing DFFs Verplex "found"
Item 4: Cadence NC-Verilog 5.6/5.8 SDF has some funky annotation problems
Item 5: Blaze DFM explains how Blaze DFM is now a power optimizer company
Item 6: ( ESNUG 464 #10 ) Yup, I see Synopsys DFTMax benchmarks well, too
Item 7: ( ESNUG 464 #1 ) A boatload of engineers on "default_nettype none"
Item 8: Synopsys says Vera won't be EOLed, instead Vera will be enhanced
Item 9: User asks if Rio RioMagic is all that great for flipchip designs
Item 10: ( ESNUG 464 #3 ) How TenSilica uses Sequence's PowerTheater tool
Item 11: Brett defends the honor of SystemC, but no Moshe for Specman "e"
Item 12: ( ESNUG 454 #12 ) One user's eval of the Gradient CircuitFire tool
Item 13: Miffed CTO reads Cooley the Riot Act over Denali characterization
Item 14: ( ESNUG 464 #5 ) Now 3 more users come to rescue Synchronicity
Item 15: ( ESNUG 454 #18 ) Yet another user yarping on EVE ZeBu emulation
Item 16: Cooley does a public Call-For-Theories on Cadence going private
============================================================================
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/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
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