Editor's Note: With all the courtroom drama heating up in the recent
Synopsys vs. Magma lawsuit, I thought it would be interesting to ask:
1.) Months from now, when everything's said and done, I *hope*
the end result will be:
2.) Months from now, when everything's said and done, I *predict*
the end result will be:
This is an ANONYMOUS survey; I'm just curious as to what people *want*
to happen vs. what they realistically *expect* will happen in this
EDA legal fight-du-jour. I'll run the responses in the next ESNUG.
- John Cooley
ESNUG/DeepChip.com
( ESNUG 454 Subjects ) ------------------------------------------ [04/28/06]
Item 1: Viewers react to Magma CEO's claims in "Cooley Does Rajeev" video
Item 2: ( ESNUG 448 #6 ) A boatload of users critique Bluespec Design
Item 3: Mentor Users Group (MUG) meets next week at the San Jose Marriott
Item 4: A Wall Street investment firm sends a public Nastygram to Wally
Item 5: ( ESNUG 451 #5 ) Well, we just renewed our JasperGold licenses
Item 6: One user's first hand eval of RioMagic chip/package co-design tool
Item 7: Synth support guru Jason Ware jumps ship from Synopsys to Cadence
Item 8: ( ESNUG 451 #9 ) Magma follow-up to Blast Plan Pro user critique
Item 9: Data Management may not be sexy, but we really like IC Manage!
Item 10: An invite to join the Centralized Enterprise Licensing User Group
Item 11: ( ESNUG 450 #4 ) Users unhappy FormalPro has been End-of-Lifed
Item 12: Gradient FireBolt's temperatures correlate well with test chip
Item 13: ( SNUG 04 #12 ) Hercules debug useful, Calibre debug is confusing
Item 14: ( ESNUG 451 #6 ) Global net worst delays in PrimeTime & Incentia
Item 15: ( ESNUG 451 #1 ) Users overwhelmingly say "one Verilog standard"!
Item 16: Starting from scratch, what tools would you choose to design in?
Item 17: ( ESNUG 450 #11 ) Two users on the Cadence Verisity/Axis emulator
Item 18: ( ESNUG 451 #7 ) Two more users yarping about EVE ZeBu emulation
Item 19: Barry Pangrle -- Numb3rs, Numbers, or some very Fuzzy Math in EDA
( ESNUG 454 Jobs Section ) --------------------------------------- [04/28/06]
Job 1: Santa Clara, CA - Knowlent seeks to hire 2 EDA R&D developers
Job 2: Santa Clara, CA - Magma is looking for an EDA R&D developer
Job 3: Santa Clara, CA - Berkeley seeks a senior applications engineer
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Trying to figure out a Synopsys bug? Want to hear how 22,739 other users
dealt with it? Then join the E-Mail Synopsys Users Group (ESNUG)!
!!! "It's not a BUG, 
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
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