"Well, maybe people in EDA ought to stop stealing stuff if you want
to stop seeing so many lawsuits."
- Mike Santarini, the new EDA editor at EDN, at DVcon'05
( ESNUG 440 Subjects ) ------------------------------------------ [03/03/05]
Item 1: ( ESNUG 434 #3 ) Four Users Speak Up For Mentor IKOS Emulation
Item 2: An Old Time User Warns of Hostile Takeover Of Cadence Users Group
Item 3: ( DAC 04 #39 ) Sagantec Says Their Market is Way Over $12 Million
Item 4: One User's Hands-On Review of Jasper's Formal Verification Tool
Item 5: ( DAC 04 #18 ) Magma Explains Blast Create, Blast RTL, and Libs
Item 6: Since Forte Bought CynApps, CynLib Disappeared. What Happened?
Item 7: ( DAC 04 #8 ) Four Users on DC-FPGA vs. Synplicity Synplify Pro
Item 8: ( DAC 04 #20 ) ReShape Responds To User Technical Complaints
Item 9: ( DAC 04 #23 ) PrimeTime-SI Found Our Magma Crosstalk Failures
Item 10: ( DAC 04 #24 ) Fishtail On NC-Verilog Support and False Paths
Item 11: Goering, Santarini, Peggy, & Video on the DVcon'05 Bigwig Panel
============================================================================
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!!! "It's not a BUG, 
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
The complete, searchable ESNUG Archive Site is at http://www.DeepChip.com
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