( SNUG 10 Item 2 ) ---------------------------------------------- [04/22/10]

Subject: What 238 users would change about Synopsys, Inc.

LARRY, MOE, CURLY:  I expected lots of user banter about changing or fixing
various specific tools in the SNPS portfolio.  What I didn't expect were the
many complaints about Synopsys arrogance/indifference towards customers, a
truly messed up pricing/licensing scheme, and weak customer support.

    A voodoo priestess formerly from New Orleans swaps your soul with
    Aart de Geus, CEO of Synopsys.  Even though you were a Synopsys
    customer before, *you* are now the CEO of Synopsys:

    What 2 or 3 Synopsys things would you DEFINITELY change?

         ----    ----    ----    ----    ----    ----   ----

  1) LISTEN TO CUSTOMERS!!! CODE THINGS THEY NEED, NOT USELESS FEATURES
     THOUGHT UP ON SOME WHITE BOARD IN MOUNTAIN VIEW BY PEOPLE WHO DON'T
     ACTUALLY DESIGN CHIPS!

  2) ACTUALLY MAKE FEATURES YOU CLAIM WORK WORK THE FIRST TIME, NOT
     "THE NEXT RELEASE"

  3) DON'T LIE ABOUT YOUR TOOL CAPACITY

  (yes, all that was SHOUTING ...)

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Put customer back as focus, not corporate profits.  Cadence has had to
  learn that lesson the hard way, looks like Synopsys is headed down the
  same path if things don't change.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  - Turnaround time for features to be implemented by R&D.  Change from
    "oil tanker" to "yacht".
  - More emphasis on first releases rather than knowing that it's buggy
    and having to wait for SP releases
  - Take customer input on AE capabilities, and change, rather than
    losing customer confidence
  - Change sales' attitude

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  1) Stop talking down to your customers and show them some damn respect.
     If you believe your customer is a bunch of idiots, just remember they
     chose your tool as the best.  Everything is viewed as a user problem
     first, unless proven otherwise.  Then when its proven otherwise you
     still throw up a beauracracy to avoid fixing it.  Stop telling us
     "well TI doesn't have this problem, and they know what they are
     doing".  Yes...  your R&D, marketing and such ROUTINELY say crap like
     this.  The way your people talk to us, its like your customers are a
     burden for your company.   Stop being so defensive, treat customers
     as peers, and engage in some closed loop technical discusions.

  2) Be honest.  It is very clear you line up your company "official line"
     to match what your product currently supports.  You lose all credible
     when you cannot admit your own faults to your customers.  Plus, your
     R&D and AE staff actually believe the corporate "official line" and
     don't believe the BS that it is, which makes developing any sort of
     working relationship impossible.

  3) Your turn time on issues is ridiculous.  The two releases a year and
     "oh ya, you didn't get it in time for the next one" basically means
     any new feature or bug fix takes 12 months to get done.

  4) Tools should always be proactively developed based on customer needs,
     not the bare minimum you need to do in order not to lose a customer.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  * arrogant behaviour
  * more standard, less proprietary

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  1) Customer support
  2) Attitude
  3) Did I mention customer support and attitude ?

      - [ An Anon EDA User ]

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  CHANGE: Get sales people to understand connectedness/requirements of
  licensing for various tools/options.  At least twice now (maybe 3
  times), we have been burned by "oh, I didn't know you needed this other
  license that I forgot to quote in order to run the upgrade to
  DC-T/PT-SI/etc that you just bought, please cut me another PO for that
  other tool when you have no negotiating leverage."  If that's a selling
  strategy by design, it's evil, and otherwise it's just incompetent.

  I'd love to see them cut prices, but we all know how that goes.  Or,
  figure out how to be invested in MY success with my tapeout instead of
  getting paid even if the tool you sell me doesn't solve my problem.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  * Reprice World Wide licenses (Synopsys is the only CAD company whose
    pricing forces us to use continental licenses).

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Price and performance

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  It takes too damn long to buy small licenses.  It took 3.5 months to buy
  two new HSPICE licenses.  On the HSPICE front, why does the full Cadence
  integration and waveform package cost MORE than HSPICE itself?

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Pricing and licensing model is difficult sometimes.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  startup pricing model
  sales overheads, put more $ in R&D

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  The pricing structure per feature of Synplify is ridiculous.  At least
  put the Technology Viewer into the regular Synplify.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  The price.  Make SNPS toolchain also affordable to low duty-cycle users.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  As CEO, I want to make money, so I would constantly raise prices and
  increase my product portfolio through acquisitions of companies in
  non-overlapping technologies plus get long-term contractual and
  financial commitments from my customers that lock them in at
  Synopsys-favorable terms.  Hey - maybe that swap already took place!

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Pricing, and Licensing

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  The license models.  Why do we have DC-Expert and DC-Ultra, if we're
  supposed to use DC-Ultra only?  Why is multi-scenario (DC Graphical)
  that more expensive?  Why do we have different Galaxy-* licenses, if
  we can only buy them together for ICC?

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Price too high.  SNPS not the only game in town.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  We hate DesignWare (forced to pay for something we basically don't use).

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Change SNPS' focus on revenue margin, stocks and shareholders value
  instead of customer needs and long future plans.

  Change the size of the support organization and their responsiveness.
  I'd double or tripe the support capabilities.

  Some of the staff: Fire all the overzealous salesmen that rip off
  customers rather than playing open.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Improve quality of Support Staff.  All tools have issues/bugs - having
  something help us with tool issues and let us focus on design issues
  is very important.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  I'd change their customer support.  Their AEs are invisible.  One AE per
  million customers?

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Dedicated Technical Support Rep.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Fix SolvNet - the search engine that used to be great SUCKS to the point
  of being almost useless now.

  Fix the relationship between R&D and the AEs such that the AEs are the
  customers, instead of having to "convince" R&D to change/fix things.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  * Re-evaluate support center effectiveness.  Closing tickets seems to be
    a higher priority than actually helping customers.  AE's seem to be
    more technically qualified at helping customers.  The support center
    should have & use more real-time access to the lab engineers.

  * Give customers who submit tickets which result in STARs the ability
    to see what's happening with those STARs on SolvNet.  All I see is
    the description and the date opened -- no discussion about workarounds
    and/or solutions.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Get the different business groups (for different tools) to work and
  talk together better or more often.  I have the impression that the
  one group not always knows what the other group is doing.  Still the
  tools need to exchange data.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Have the old Apollo-like tools be rewritten like (or integrated in,
  whatever is appropriate) the more modern tools (DC, ICC, PT).

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  I'd have R&D make Tcl scripting more intuitive.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Do a real and complete System Verilog implementation, rather than a
  wrapper around Vera that is restrictive semantically.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Support both UPF and CPF for low power design.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  The UPF flow seems a bit iffy.  Needs lots of hand-holding and high
  level of support from Synopsys to make it work.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Make the tools more interoperable.  ASIC houses today don't have just
  one tool suite from one vendor.  We need to be able to go from vendor
  tool to another vendor's tool more easily.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  individual relationship
  stop hiding behind auditors

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Get Janick off his high horse and tell him to work with OVM to make a
  standard SV metholodogy (and don't do a half-hearted job at it).

  Get more serious about C synthesis.

  Make PT better.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  For VCS, I'd get complete and bug free support of all of SV in place.
  For Synplify... make it faster?  I'm really pretty satisfied with
  Synplify as a tool.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Reduce bugs in Primetime and DC.  Their quality has dropped over the
  last few years.  Before we never got bad logic out of DC.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  dc_shell.  Why do I still have to wait until SP4 or 5 before it is
  safe to use the latest release?

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Fix bugs (and fix them well) before moving on newer things.

  Overhaul the whole DC?  More and more, it looks like the whole tool is
  growing cancer tissue...

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Fix DC and Primetime.  They require too much ad-hoc wrapping to deal
  with very common design situations (i.e. interface skew requirements,
  source synchronous interfaces, DDR memory interfaces).

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Formality should support FPGA tools, at the minimum they should support
  Synplify that they do not. Synplify needs to work better in quality and
  repeatability in their results, as well as focus more on FPGA power..

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Synopsys is very ASIC oriented and it would be good to get them to pay
  more attention to the FPGA customers as change is coming.

  Synopsys and Synplicity BU need to work together better.  Right now they
  are two different companies, except for certain things like licensing
  where they tried to combine and made it more difficult.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Emphasize RTL to placed gates flow rather than RTL to netlist.
  Drop markets where SNPS is an distant third.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Standardize with other vendors, both in System Verilog (dump VMM) and
  SystemC (standardize synthesis commands)

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Create more detailed, readable docs.  Something more in the vein of a
  Linux man page, instead of the Microsoft what-do-you-want-to-do style.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  1. Improve on their mixed-signal to-down design methodology to enable
     true mixed analog/digital/RF analysis and verification.

  2. Revisit the work on power rails and on-die voltage drop analysis
     methodology to enable static IR/EM, dynamic and on-die modeling for
     power delivery and package design.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  1) push for opening the standards

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Update documentation to include some of the harder stuff - lots of
  advanced techniques aren't covered and we have to go to the AEs to
  figure things out.  I guess that's why they're there, tho...

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  unify SystemVerilog compilation and LowPower/MVcomp/MVSIM into VCS kernel
  to accelerate the simulation

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Dump LEDA and get a real linter/rule-checker.

  Make your LEC tool (Formality) check designs (RTL-to-gates) without
  having a Synopsys AE camped out with you.  It has improved, but we still
  went through 3 months of h*ll try to get LEC passing on a large,
  complex chip.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Their Verification IPs, they do not support any other vendors.  As far as
  VIPs are concerned Synopsys OUT, Denali, Mentor IN.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Formality debug interface to make it easier to find and fix mismatches.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  1) Fix STAR_RC to have much less parasitic R and C components - it is
     over 2X CADENCE to as much as 45X CADENCE which makes simulation runs
     slow to impossible.

  2) Have HSPICE simulator give more user friendly errors so that one could
     easily debug a first time simulation run.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Make ICC more intuitive and add a point-to-point router

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  ICC (bugy!)

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Support IC package, board level design flow.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Testing and QA, especially on backend tools with legacy libraries and
  technology.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Invest more in IP.  Unlike the number of customer-licenses for tools, the
  number of standard functions integrated into chips is likely to grow.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Merge VMM with OVM to create a single industry standard.

      - [ An Anon EDA User ]

         ----    ----    ----    ----    ----    ----   ----

  Get rid of non-standard MW and be more supportive of standardization
  efforts like OpenAccess.

  Get back to a sharper focus on areas Synopsys are good at and not try
  to eat-all-you-can.

      - [ An Anon EDA User ]
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