( SNUG 07 Item 6 ) ----------------------------------------------- [03/25/08]
Subject: Synopsys DFT Compiler/TetraMAX vs. Mentor DFT Advisor/FastScan
CLASHING DATA -- Here's where my data and Gary Smith's data differ greatly.
He sees Synopsys DFT Compiler scan insertion and Mentor FastScan ATPG as the
two dominant players. But my data says:
2005 - Synopsys DFT Compiler: ################## 44%
Mentor DFT Advisor: ######## 21%
Synopsys TetraMAX: ##################### 53%
Mentor FastScan: ############### 38%
Cadence Test Encounter: ## 4%
2007 - Synopsys DFT Compiler: #################### 50%
Mentor DFT Advisor: ###### 16%
Synopsys TetraMAX: #################### 51%
Mentor FastScan: ########## 26%
Cadence Encounter Test: ##### 12%
Magma Blast DFT: #### 10%
homebrew tools: #### 9%
"My data for Synopsys DFT Compiler is that it's 78%; not 50% of the scan
insertion market," said Gary. "The second place in scan insertion is
Genesys with 10%, but I've heard they might be going out of business.
Mentor's DFT Advisor is 6%, but since the Sierra acquisition it has a
chance to grow."
"On the other hand, I have Mentor FastScan leading by 2X over TetraMAX,
which is directly opposite of your numbers, John," added Gary.
In other words, according to Gary, my DFT Compiler percentage is too low
and my TetraMAX percentage is too high. Why that is, I don't know.
Scan compression seems to be slowly catching on with Mentor in the lead:
2005 - don't use: ############################### 78%
Mentor TestKompress: ####### 17%
Synopsys DFT Compiler MAX: ## 5%
2007 - don't use: ###################### 56%
Mentor TestKompress: ########## 26%
Synopsys DFT Compiler MAX: ####### 17%
LogicVision: # 2%
SynTest: 0%
homebrew tools: #### 9%
"Scan compression will become more important as the designs get bigger and
bigger," concluded Gary. "A 45 nm, 100 M gate design can't sit on the test
bed for a month. It's just not economical."
---- ---- ---- ---- ---- ---- ----
DFT is my forte.
Synopsys DFT Compiler: Comparable to Mentor DFT Advisor, but has OCC
capability that Mentor does not have. Magma BlastDFT is weakest of all.
We have all 3 tools, but mainly use DFT Compiler.
Synopsys TetraMax: Comparable to Mentor FastScan, better than Cadence.
We have FastScan, but we have some experience with Synopsys/Cadence.
Synopsys DFTMax: Slightly less capable than Mentor TestKompress, but
easier timing closure. We have LV tools, but not ETCompression.
- [ An Anon Engineer ]
Cadence Test Encounter is from IBM, which in ASIC design is the
benchmark. We like the tight integration into Conformal.
- David Schwan of Sirenza Microdevices
We are using an all Mentor test flow (BSD, TestKompress, MBIST) on
our current chip and are somewhat disappointed. We had assumed these
tools would be integrated, but each of them is really a distinct
tool. For instance, one tool modifies the hierarchy in way that
messes up the other tool. We had previously been using an all
Synopsys flow and had not had major issues. We will probably go back
to using DFTMax over TestKompress due to the better flow integration.
If only Synopsys followed through on their MBIST plans, then we
could have standardized.
- [ An Anon Engineer ]
using DFT Compiler, Cadence Test Encounter, Mentor TestKompress
- [ An Anon Engineer ]
Mentor FastScan with Magma Blast Create -- works -- but FastScan can be
pretty cryptic. (I guess all DFT tools are.)
- [ An Anon Engineer ]
Using Synopsys for all because got the whole enchilada as part of a
package business decision.
- [ An Anon Engineer ]
Magma Blast DFT
- Giovanni Bezzi of Nokia Siemens Networks
We use Synopsys DFT Compiler/TetraMAX and Synopsys DFT MAX
- [ An Anon Engineer ]
Using Cadence Test Encounter. Convenience of single tool vendor gives us
better pricing and also better support - don't get into the blame game of
"That's a LogicVision problem, not Encounter" etc.
- [ An Anon Engineer ]
We use in-house test tools.
- [ An Anon Engineer ]
using DFT Compiler & TetraMax & LV ETcompression. adaquete.
- [ An Anon Engineer ]
Our next project will be using TetraMAX and DFT MAX after management
decided we need to pull DFT into our own workflow rather than
handing it off to a service provider.
- [ An Anon Engineer ]
We are contracted with Synopsys Design Services for DFT.
- [ An Anon Engineer ]
Synopsys DFT Compiler and Compression for top level. Magma Blast DFT for
scan insertion and optimization at subchip level.
- [ An Anon Engineer ]
Presently, using DFT Compiler/TetraMax/DFTMax. Under pressure by
legacy-LSI to move to Mentor for everything on the next projects.
What we will look at after this tapeout, is SNPS DFT Compiler at the
block level and Mentor DFT Advisor/FastScan/TestKompress at the top
level to finish the chip.
- [ An Anon Engineer ]
One of our current projects is using DFT Compiler and DFTmax with
optimize_dft in IC Compiler using scan def. This is our third project
using this flow and it works well.
- Jonathan Bahl of COT Consulting, Inc.
I preferred FastScan but we're stuck with TetraMAX.
- [ An Anon Engineer ]
Depends on the project: DFT Compiler/TetraMAX and Cadence Encounter Test
used. Cadence Encounter Test is better.
Was using Cadence OPMISR+; now Synopsys DFT MAX
- [ An Anon Engineer ]
Magma Blast DFT, LogicVision.
- [ An Anon Engineer ]
I'm using TetraMax, Blast DFT was a product that we shelved a year ago.
- [ An Anon Engineer ]
Project currently uses Mentor DFT Advisor/FastScan/Mbistarchitect.
Have some minor issues but no major complaints.
- [ An Anon Engineer ]
Cadence Test Encounter. I'm not the guy running it tho.
Last ASIC (1yr) used DFT MAX... Lots of crashes, esp when using the
test compression. Eventually it worked with AE help.
At the time LogicVision had no BISR solution.
- [ An Anon Engineer ]
I use DFT Compiler for test insertion and FastScan for vector generation.
- [ An Anon Engineer ]
Synopysys DFTMax. Mentor TestKompress is better than rest. Encounter
Test is worst. We choose DFTMax as it was cheaper than TestKompress.
- [ An Anon Engineer ]
Synopsys DFT Compiler, Mentor TestKompress.
- [ An Anon Engineer ]
FastScan/TestKompress (using and evals came back with Mentor being best)
- [ An Anon Engineer ]
I personally haven't used any but a coworker prefers Mentor to DFT Compiler
- Jared Bytheway of Cirque Corp.
We use TetraMAX and FastScan.
- [ An Anon Engineer ]
We do scan insert within synthesis tool (no brainer = Magma Blast-DFT.
Mentor ATPG/compression all the way.
- [ An Anon Engineer ]
TMAX works great for us, so we haven't evaluated anything else. We
don't use test compression.
- Tom Mannos of Sandia National Laboratories
I've only used Synopsys DFT Compiler and TetraMAX. DFT Compiler seems to
change radically every few releases. I've had to re-write my scripts
every year or so. Although, it's getting better (I found some ugly core
dumping errors a few years ago.) Note this is for fairly simple small
designs. I'd hate to fight what I had to fight on a large chip. TetraMAX
seems to work well.
Only used standard ATPG, no compression, at speed testing, etc...
- [ An Anon Engineer ]
I think we're using in-house tools for these functions.
- [ An Anon Engineer ]
Mix of Synopsys and LV
- [ An Anon Engineer ]
Using Synopsys DFT Compiler/TetraMAX
- Jerome Poidevin of Atmel
Magma Blast DFT
- [ An Anon Engineer ]
DFT Compiler is not yet a substitute for in house tools.
- [ An Anon Engineer ]
We use Mentor FastScan/Testkompress.
- [ An Anon Engineer ]
DFT Compiler/TetraMAX
DFT MAX
- Garrett Godfrey of Imagination Tech
Synopsys DFT Compiler/TetraMAX.
- John Stiles of Silicon Logic Engineering
I'm using DFT Compiler. (I'd like to test Mentor to see if it's better
these days - I don't like DFTC)
- [ An Anon Engineer ]
DFT Compiler/TetraMAX, DFT MAX
- Manfred Kaiser of Atmel
We found improved results (and cheaper) from Mentor. We use Mentor
Advisor/FastScan. Tried TestKompress, but not enough gain for the
price, given our low flop counts.
- [ An Anon Engineer ]
Cadence Test Encounter
- [ An Anon Engineer ]
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