( SNUG 04 Item 16 ) ---------------------------------------------- [08/11/04]
Subject: DC-FPGA and FPGA Compiler II
NOT RECYCLED: The 2002 Dataquest numbers have Synopsys as a distant 3rd in
the FPGA synthesis market. Nothing new here; it's been that way for years.
Dataquest FY 2002 FPGA Synthesis Market (in $ Millions)
Synplicity Synplify ################### $19.4 (44%)
Mentor Exemplar ################### $19.0 (43%)
Synopsys FPGA Compiler II ##### $5.3 (12%)
others . $0.4 (1%)
But it's important to note these are slightly different tools. Synplicity
and Exemplar primarily target straight FPGA synthesis. Synopsys pretty
much bailed on that strategy when it dumped its FPGA Express tool and
focused instead on FPGAs-for-ASIC-prototyping market. That is, Synopsys
FPGA Compiler II, and their newly announced DC-FPGA, emphasizes that you
can easily migrate your ASIC into an FPGA using pretty the same DC scripts
you used to originally synthesized your ASIC in. It's a portabilty thing.
Judging from the user response, the general feeling is that DC-FPGA is not
warmed over FPGA Compiler II, but instead it's new Synopsys tool.
10.) What do you think about the new DC-FPGA tool that Aart announced?
In your opinion is DC-FPGA just a warmed over FPGA Compiler III or
a new tool that you're interested in using? (For those who went
to SNUG, what did you think of John Daane, the CEO of Altera,
giving a keynote on DC-FPGA?)
Based on our experience, DC-FPGA is much more than a warmed over version
of FPGA Compiler II. Synopsys seems to be doing a much better job of
keeping their FPGA compiler technology current with their mainstream
ASIC synthesis technology.
- Dave Brown of Agere Systems
As beta customer we've evaluated it already several months ago. It fair
to say the DC-FPGA is a brand-new tool that by far surpasses the
performances of FPGA Compiler II, in term of area and above all maximal
speed. The synthesis flow and scripts are finally pretty much similar
to those of the traditional DC for ASIC design, so that you can re-use
most of your ASIC scripts for FPGA prototyping and vice versa.
One thing is however to be underlined, DC-FPGA is mainly targeted for
the expensive FPGA devices such as VirtexII, VirtexIIPro and Stratix II.
Thus while DC-FPGA might provide important benefits for prototyping (in
term of better QoR and/or reduced design time), it might still not be
that relevant for volume production, where less expensive devices are
often employed. Such devices might even be supported by DC-FPGA in the
future, but the if QoR is less important than money (the tool is not for
free) you might still keep on designing with the almost for free Xilinx
XST or with other cheaper tools from some competitors.
- Marcello Vena of Xignal Technologies AG
I think DC-FPGA is what is was made out to be: an outgrowth of DC. It
seems to be the right approach. A small number of prototypers are
interested in it here.
- Andrew Bell of PMC-Sierra, Inc.
We have recently experimented with DC-FPGA vs. Synplify. We achieved
very similar results with the two tools. Big improvement for Synopsys
over their old FGPA Compiler II. Synopsys is still in catch-up mode,
though, lacking a physical synthesis tool for FPGAs (at least for
Altera whom we use) ala Amplify.
- [ An Anon Engineer ]
While we were exploring other options our Synopsys account manager
suggested we try DC-FPGA. I downloaded the tool, made a handful of
changes to my DC synthesis scripts, and within a couple of hours
Xilinx ISE was reporting our design was at 82% utilization. This
allowed us to add functionality to our design such that we were able
to complete a working prototype with basic compliance with
IEEE 802.15.3.
We were sufficiently impressed with DC-FPGA that we bought it and
continue to use it.
- Dave Ohmann of Alereon, Inc. (ESNUG 427 #2)
DC-FPGA appears to be no different then FPGA Compiler II. It does not
solve the multiple flow problem. We are very happy with Synplicity for
our FPGA prototyping.
- John Blessing of Harris RF
Just as I wouldn't go to Synplicity for ASIC tools, I wouldn't go to
Synopsys for FPGA tools.
- [ An Anon Engineer ]
We synthesized 9 designs were using DC-FPGA. I consider this tool a
great choice for ASIC creators interested in prototyping in FPGA.
- Jeff Benis of Synfora, Inc.
My view is that Synopsys never really wanted to play in the FPGA market.
Due to fast shrinking of ASIC market, they are forced to play in FPGAs
or depend on the Intels, TIs, and STs of the world only. Seems to me
that the big ship Synopsys is starting to turn, but it will take a year
or two to see if it is real turn.
- [ An Anon Engineer ]
I am not interested in the Synopsys FPGA synthesis tools since I am
angry with the past strategy of Synopsys:
FPGA Compiler -> FPGA Express -> FPGA Compiler II...
Mentor Exemplar tool is enough.
- [ An Anon Engineer ]
It seems like there's a new DC-FPGA Compiler tool every 5 years or so.
Whenever I've needed to map FPGA's to ASIC's, a lot of code tranlation
is required.
- [ An Anon Engineer ]
Most of the problems we had with DC-FPGA were fairly minor (interface
problems to Xilinx tools, renaming design problems, handling interaction
with some of our internal EDA tools, etc.) and were resolved quickly.
Also, none of these issues were show stoppers or unexpected for a new
tool. Synopsys tended to be very responsive when we had problems.
All-in-all, DC-FPGA is a pretty comprehensive tool and has a lot of
functionality some of which we hadn't had a chance to use yet. On
future projects we plan to use its gated clock transformation feature
and perhaps the multi-FPGA partitioning capabilities.
It looks like Synopsys might have actually got FPGAs right this time.
- Han Nuon of Qualcomm, Inc. (ESNUG 427 #2)
We lost confidence in Synopsys FPGA synthesis tools. Now we go on with
Simplify and Exemplar Precision RTL and are OK like that.
- [ An Anon Engineer ]
I have been designing FPGAs for 10++ years. Main target is and was
real-time ASIC prototyping for extended measurements, which would
never be possible with system simulation.
For Synthesis I had used:
- former ViewLogic SW (targeting Actel, Xilinx)
- Synopsys Design Compiler plus FPGA option (Xilinx)
- FPGA Compiler II (Xilinx)
- and now I started evaluating DC-FPGA for our Xilinx chip
FPGA Compiler II was a tool we NEVER became happy with, reasons being:
- the tool is OK if you intend a one-SINGLE-FPGA solution
- the tool is usable (but not really satisfying) when distributing
logic over 2 or more (we: up to 8 x2cv6000/xcv3200) FPGAs.
- FPGA Compiler II was good for small (padless) internal blocks only,
otherwise runtime would raise excessively.
- no aid for partitioning! Grouping is handwork!
- in parallel we always needed old versions of Design Compiler to
take advantage of the group/ungroup options, where we generated
empty FPGA-padring designs. (I was told that Synplicity had really
good tools for automatic partitioning over several FPGAs, but I do
not have no access to).
- for many years there has been no way from Behavioral Compiler
output to synthesizable RTL FPGA Compiler II input. Now this
problem has been solved, but BC is now discontinued!
DC-FPGA
- first runs look promising, synthesis time appears to be faster by a
factor of 1.3x to 1.7x compared to FPGA Compiler II.
- grouping / regrouping of big designs is now possible (yet no
automated solution found!)
- "close-to-border-results" may fail. I synthesized a x2cv6000,
which was NOT routable by Xilinx backend software due to slice
overmap overflow (106%).
- library support is still poor. New Xilinx devices (eg: x2cv8000)
are not or too late supported by software releases.
- no option is available for defining a "hyper-FPGA", where the
target of synthesis would be a rough estimation and identification
of necessary resources and partitioning, eg. # of MUL18x18, RAM,
RAM-based FIFOs, LUTs, etc.
I can say now that we will move away from FPGA Compiler II to DC-FPGA.
- [ An Anon Engineer ]
We are pretty happy with Synplicity and no need for the replacement.
- Edmond Tam of Global Locate, Inc.
Who cares? Doesn't anyone who really wants good results already own
Synplify anyways? Synopsys has stumbled for years in FPGAs. Why
should anyone believe they will succeed now?
- [ An Anon Engineer ]
We are looking at DC-FPGA. Design groups here are interested but
no hard data yet.
- [ An Anon Engineer ]
I've used DC-FPGA and it seems to be DC for FPGAs, not a warmed over
FPGA Compiler III. All the same commands work exactly as in DC, and
support for DesignWare is even there as well. I use it for synthesis
for a verification accelerator, and the ability to use virtually the
same scripts as the ASIC target makes the workflow much easier in my
mind. I like it, it is my FPGA tool of choice targetting Xilinx
Virtex II.
- [ An Anon Engineer ]
DC-FPGA is definetely not a warmed over version of FPGA Compiler III.
Having the dc_shell interface is extremely convenient since we can use
our identical ASIC scripts with FPGAs. DC-FPGA gave us good results
retiming designs. Liked its clock gate removal feature.
- Steve Chou of Tensilica
We're not interested in a FPGA Compiler III. We spent a long time
trying to work with FPGA Compiler II and in the end took the flow hit
and moved everything over to Synplicity. We're now happy with
Synplicity and wouldn't move back to DC-FPGA.
- [ An Anon Engineer ]
We used pre-release DC-FPGA last year and I found it adequate for
functional implementation but not something that my company is likely
to commit to. Most of our FPGA work internally is all Synplicity-based
and the only hassle is in carefully abstracting DesignWare components
carefully to keep the designs portable.
- [ An Anon Engineer ]
Synopsys is trying to make a lot of noise again for their case that
FPGA and ASIC synthesis should be merged. I think that makes about
as much sense as combining radiator coolant with fuel.
- Steve Weir
Warmed over FPGA Compiler III. Was there any doubt?
- Gord Allan of Carleton University (Canada)
All I have to go on is the Synopsys marketing, so DC-FPGA looks like a
significant new tool. If we were doing large FPGAs I'd want to evaluate
it. But we're not, so draw your own conclusions. :-)
- [ An Anon Engineer ]
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