( SNUG 03 Item 25 ) ---------------------------------------------- [05/14/03]


Subject: The Synopsys/Avanti 2003 Report Card

One of biggest surprises I found in this survey was that users gave Aart's
System Verilog a 92% approval rating.  Usually people are eager to complain,
not approve.  With Aart putting the kibash on VHDL, the pressure is now on
for Synopsys to get System Verilog synthesis, STA, and simulation out the
door and into customer's hands ASAP.  Gotta grab that System Verilog market
share *now* before Cadence does.  The good news is the $28 million VCS still
brings in a healthy 53% of the Verilog simulation business.  But that
SystemC image problem has been haunting Aart for 3 years now.

In other bad news, the $12.5 million Vera slipped from 43% market share down
to 30%.  Its rival, Verisity, has jumped up to 58%.  It's not all bad news
though, because users think that System Verilog will completely wipe out
*both* the Vera and Verisity business.  Why buy extra verification languages
when its built into System Verilog?

Ketchum/FormalVera/Magellan or whatever its called now seems to be a breech
baby.  0-in and Verplex BlackTie are temporarily safe for the time being.

Module Compiler is staying steady and an obviously stoned Gary Smith thinks
that SystemC is going make Behavioral Compiler (or its clone) grow 15x over
the next 5 years to $36 million.  Talk about being revived from dead!

Power Compiler was another big surprize.  This $9.2 million tool has 81.4%
market share and lots of users are *very* interested in it these days.

Synopsys is getting pistolwhipped in the FPGA synthesis market.  It was 14%
market share last year.  Now it's 7%.  They do nicely, though, in the uber
esoteric FPGA / ASIC migration niche because they're the only game in town
on that one.  It's FPGA Compiler II and their unannounced DC-FPGA tool here.

TetraMAX ATPG now only owns 31% market share, but its twin DFT Compiler owns
a whopping 91% market share in scan insertion.  SocBIST and DBIST are too
new to judge.  Altogether Synopsys test pulls in $31 million a year.

While plain vanilla PrimeTime is the Ron Jeremy porn star of the STA world,
PrimeTime-SI is its Peewee Herman in desperate need of Viagra.  (PrimeTime
has 98% market share and pulls in $26 million, BTW.)

Another weird surprise is that Formality trounced Verplex this year.  We're
talking a 70% to 30% approval rating in favor of Formality.  Dataquest has
the $22.4 million Formality at 47% market share and Verplex at 45% market
share -- but these are 2001 numbers.  Judging from the user data, it'll
probably skew heavily towards Formality next year.

Floorplan Compiler and Jupiter-XT are the Synopsys equivalent of having an
idiot uncle and an idiot child hidden in the basement that no one likes to
talk about.  Cadence has completely sewn up the ASIC floorplaning market
with their $15.4 million, 52% market share First Encounter tool.  Ouch!

The $41 million PhysOpt has 41% market share, and judging from it's 5 to 1
user approval rating, it'll easily break 50% within the year.  Roughly half
of the Avanti Apollo users have migrated over to Astro -- which users report
has a 3x to 6x speed up.  Nice.  Avanti P&R is $94 million and 36% share.

Hercules can't complain that it's bringing in $28 million, but it'd be cool
if it could grow beyond its 3rd place 22% market share.  Star-RC has a false
first place $29 million 38% market share in the fragmented extraction market
because Cadence just bought Celestry -- giving Cadence $30 million.

Avanti HSPICE is 1st place at $23 million and 38%.  Nassda is close on their
heels, though.  Avanti Saber is 2nd place $8.6 million and 16%.  Saber is
forced to pay homage to Cadence's Spectre here.

Overall customers were very pleased with the Avanti merger this year.  It
saved their Avanti tools from Cadence's lawyers plus the users are *very*
much interested in having their Avanti tools upgraded to the much higher
Synopsys levels of customer support, documentation, and general QA.  They
are also interested in seeing *all* the Synopsys and Avanti tools running
on one nicely debugged Milkyway database -- making data transfer between
stages in their flow a breeze.

Oh, yea, I almost forgot.  Kubla Khan had nothing compared to the empire
Design Compiler rules with its 91% market share.  Still going strong after
all these years.


    "In Xanadu did Kubla Khan
       a stately pleasure-dome decree,
     Where Alph, the sacred river, ran
     Through caverns measureless to man,
       Down to a sunless sea."

         - Samuel Taylor Coleridge, British poet (1772 - 1834)


    "On a side note, just to continue my Cadence bashing, one of the biggest
     differences between Cadence and Synopsys is that Synopsys works the
     engineering community for input and mind share, while Cadence is only
     interested in talking to senior management, to the point that I've had
     Cadence presentations stopped part way through if my senior manager
     who's only there out of courtesy, needs to leave.  Synopsys in that
     case would ask if we want to wait for the manager to return, and if we
     continue, will ask the manager if he wants a recap when he returns.

     Cadence builds a relationship with top managers, and count on the tool
     decisions being pushed down, while Synopsys builds the relationship
     with engineers, and low level managers, and count on the tools
     decisions pushing up, with low level buy in already there.  I know
     which model I like better."

         - [ An Anon Engineer ]


    "Success usually comes to those who are too busy to be looking for it."

         - Henry David Thoreau, early hippie philosopher (1817 - 1862)


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   (  >  )
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    _] [_         Verilog, VHDL and numerous Design Methodologies.

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   !!!     "It's not a BUG,
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 (  >  )
  \ - / 
  _] [_     (jcooley 1991)