( ELSE 06 Item 19 ) -------------------------------------------- [ 06/23/06 ]

Subject: Magma Blast Fusion, -Rail, -Plan Pro, -ATPG, -DFT, -Power

THAT DAMNED LAWSUIT -- I noticed 2 interesting trends in the general Magma
user responses this year.  The first is that users are still very bullish
on the mainstream Magma tools like Blast Fusion, -Rail, -Plan, -ATPG, -DFT.
The second is that *most* of the Magma customers asked to be *anonymous*
in this section of the census this year.  (Some were signed Magma users in
prior years.)  And although no one said so (and I never asked) it's my best
guess that it's that damned Synopsys-Magma lawsuit that's scaring them.  :(


    Magma has a very well integrated suite; an Intel ASIC was successfully
    taped out recently, mostly on Magma.

        - [ An Anon Engineer ]


    Blast Plan and Blast Fusion Rocks! 

    Pluses:

    Great integration, ease of use, and QOR, with plenty of options for
    customizing your runs.  Far superior to SocEncounter flow (and I
    suspect to Synposys' flows -- though I have no personal experience).
    M-tcl interface to probe and/or modify design is extremely powerful
    and useful. 

    Minuses:

    Their flat post-layout netlist with no hierarchy can cause real
    headaches for ECOs and verification.  Sometimes excessive runtimes,
    especially for fixing SI effects.

    Overall: great tools

        - [ An Anon Engineer ]


    Nice tools and getting a LOT of traction all over the place.  We hear
    a lot more about Cadence and Magma now than Synopsys.

        - [ An Anon Engineer ]


    Blast Fusion:

    Been a Fusion user for ~5 years.  Glad to see a stronger partnership
    with foundries to work on smaller geometry issues.  Competition seems to
    be improving in the last few years after they decided to take the last
    3-4 years off and concede the market to Magma.

    My biggest wish list: multi-threading (and not just the router, the
    entire tool... timer, placer, extractor, etc).  Runtime and block sizes
    are getting larger, and CPU clock speeds aren't.  If they want to keep
    up with our chip designs, multi-threading (and 2+ CPUs) is going to be
    a must have, and I'm not sure if they are taking this seriously yet.

    Blast Rail:

    Evaluated it, and it didn't fair well versus competition.  Too slow, and
    lack of a good dynamic solution.

    Blast Plan Pro:

    It's a very complimentary tool to Fusion.  We are moving all of our
    designs from Jupiter-XT to Fusion.  Like most floorplanners, it does
    suffer a bit from the "little brother to the PNR tool" syndrome, though.

        - [ An Anon Engineer ]


    I ranked Magma "Best In Show" for the 2nd year in a row in P&R.

    Anaconda looks compelling but no matter how hard I ask, I have not been
    able to try it.  It's now come out as Talus.  It's their multi-CPU
    approach to Blast Fusion.  They claim is does RTL to GDSII in 50 hours
    finished.  That must be for simple designs.  The more complex, with the
    more macros must task longer.  I don't know.  I haven't tried it yet.
    They claim it has new code.  I'm guessing it does.  They're offering
    new scripts with it to make it easier to use.

        - [ An Anon Engineer ]


    I attended Magma DAC'05 suite demo.

    Magma had picked the wrong AE to present.  The guy basically was talking
    to himself, his volume was so low that the audience could hardly hear
    him.  Also he did not show any enthusiasm in the presentation.  How
    could he convince the audience to buy his product?  I had to literally
    READ the slides in order to know what Magma was presenting.  Luckily the
    slides contained some useful information.  Put it this way, Magma slides
    have better juice than the Synopsys slides.

    Magma presented the roadmap for Blast ATPG and Blast DFT.  The Magma
    delay defect feature seems to be similar to Cadence's true timing delay
    defects in Encounter Test.  This is something Synopsys has not been able
    to provide.  I believe before their release of Blast ATPG, using Blast
    DFT for scan synthesis and Mentor Fastscan for ATPG will be a better
    solution than using Synopsys DFT Compiler and TetraMAX ATPG.  (This is
    based on customer feedback that I received.  But this is rumor; the
    product Blast ATPG was not released at all in 2005!)

    Based on customer's tapeouts that I see, I think better technology and
    architecture are the strengths for Magma compared to Synopsys.  However,
    a good product needs a good team to sell and support.  Based on the
    quality of presentation skills I saw at DAC demo, I am not sure if
    Magma can really push the product and displace Synopsys in various
    accounts.  Ability to present, sell and support the product are the
    weakness I see in Magma as compared to Synopsys and Mentor Graphics.
    The presentation skills of the AEs in the Mentor suite, Cadence suite
    and Synopsys suite were way better than what Magma had in their private
    suite.

    I am not allowed to release any benchmark data.  All I can say is Magma
    has better performance than Synopsys.  However, Synopsys is good at
    using their AEs to write custom scripts to do catch up.

        - [ An Anon Engineer ]


    Anecdotally, Magma's tools sound like they are killing Synopsys and
    Cadence tools in evaluations.  If they survive the lawsuit they will
    probably be a force to be reckoned with.

    Synopsys IC Compiler sounds like their answer to Magma.  The tool
    replaces Jupiter, Astro, PhysOpt and PrimeTime.  It uses a unified data
    model and promises to do synthesis, placement, clock tree synthesis and
    routing simultaneously.  The IC Compiler input is a gate level netlist.
    During optimization, timing analysis is done at all "critical" corners,
    and then for final closure it uses all corners.  It also does timing
    driven metal fill.  It measures "critical area" - the total area where
    a particle could cause a failure, and tries to minimize it.  The tool
    will spread wires by half a pitch to improve yield.  The interface is
    Tcl only.

    Magma has a full suite of their own test tools, including scan insertion,
    memory BIST, logic BIST with test point insertion, as well as TAP and
    boundary scan insertion.  The memory BIST has built-in hard or soft
    repair capability and can share memory test controllers when there are
    a large number of memories.  It supports "physically aware DFT".  The
    tool detects if two lines are routed close together for a long distance
    and will first try to space them apart.  If that is not possible, the
    two nets are passed on to the ATPG software and a pattern is created to
    test for bridging between the lines.

        - John Weiland of Intrinsix Corp.


    We have not yet used Synopsys IC Compiler nor Magma Cobra.  We're a
    high speed customer.  Area and power are lower priority on our list.

    The good about Magma:

     - Unified data model is really unified.  You can use the same report
       and interrogation scripts across the entire flow RTL-wiring.
     - You can run from RTL to wiring in one session.
     - You can write nice clean Tcl code that works across the entire
       tool set.  You don't have to deal with object conversions.
     - You don't need a special license to use testable registers (like
       what Test Compiler required.)

    The bad about Magma:

     - Sometimes it's tricky to get the RTL gate mapping you want (at least
       when you are first learning the tool).
     - Not all DesignWare components are available in Magma, so you still
       have to use Synopsys Design Compiler to get them to gates.
     - Our fab's timing signoff is still done in Synopsys PrimeTime.
     - You need a special Magma license for designs that are 90 nm and
       below.  (So does Synopsys -- DC Ultra -- don't like that either.)

    The bottom line:

    You need to use the tool which shortens the "distance" between RTL and
    final wired timing closure.  Both PhysOpt and Magma work well.  The key
    is that if you are going to do final wiring and timing closure with
    Synopsys you should try to stay in their domain.  If you are going to
    do final wiring with Magma you should use the front end of their flow.
    Although we have been able to take PhysOpt designs and close them in
    Magma, they are not our most challenging blocks.

        - [ An Anon Engineer ]


    We are using the full Magma set of tools -- less the DRC/LVS stuff which
    they still want a lot of $$$ for -- and have been very happy with the
    performance and support.

        - [ An Anon Engineer ]


    I like Magma's consistent user interface for all its tools.  It sure
    beats Cadence DFII or IBM Chipbench for seamless integration. 

        - Tony Laundrie of Cray


    We have mainly used Magma's backend tools and I have no particular input
    except to note that their training/application support needs improvement.

    We'll be evaluating Blast Create in the near future.

        - Stephen Lai of Solomon Systech


    We have not started to use the Magma PD tools yet but we will as they
    will be qualified for our 90 nm designs.  Stay tuned.

        - Michael White of Arrow Electronics


    Once we came up to speed with Magma's Blast Fusion and the impact of
    various commands, we were satisfied with our layout results.  We were
    able go from an existing floorplan to SDF-out within just a few days
    after creating only one TCL script.

    Blast Fusion's SDC updates and ECO process still need some work.
    Additionally, we are looking for Magma to provide a good area recovery
    methodology for low power.

        - [ An Anon Engineer ]


    Magma's concurrent timing, power optimization for multi process corner
    seems very interesting.  This is the vendor claim, so we would need to
    test it ourselves using real data.

        - [ An Anon Engineer ]


    I attended the Magma low power demo.  Blast Power appears to account
    for things such as multiple power groups and multi-threshold libraries.
    The tool looked as if it would really aid in reducing the power of a
    design given its optimization methods, but that was only in the demo.
    I'll have to try it myself to see if it's real.

        - [ An Anon Engineer ]

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