( DVcon 04 Item 13 ) ---------------------------------------------- [ 05/26/04 ]
Subject: Synopsys DW AMBA, Denali PCI Express, Verisity USB
MY MISTAKE This is the shameful part of the survey where I must publically
throw myself on the mercy of the court and grovel. Ugh. It's all here:
9.) Does your company use verification IP? For which protocol? USB,
PCI, FireWire, Ethernet, AMBA, 1394? Which one specifically? Is
the IP used for reference checking only, bus-functional modeling
(BFM), or to measure coverage of the standard as well? Whose IP
do you use? Verisity? Synopsys DesignWare? Cadence? Mentor?
Do you see it? My larger-than-life error here? (I didn't see it either.)
In a suvery question about verification IP, I forgot to make any mention
whatsoever of Denali! Aaaaaargh! This means all my Denali numbers are most
likely grossly under represented. I'm sorry about that folks. :(
"Does your company use verification IP? For which protocol? USB,
PCI, FireWire, Ethernet, AMBA, 1394? Which one specifically?"
don't use : ############################################### 48%
Home grown : ################ 16%
"Vera" home grown : # 1%
"eVC" home grown : ### 3%
DW AMBA : ############# 13%
DW USB : ############# 13%
DW PCI : ###### 6%
DW PCI Express : ##### 5%
DW PCI-X : ###### 6%
DW 10/100 : ## 2%
Synopsys TWB : # 2%
Synopsys Mempro : # 1%
vague "DW" : ### 3%
Denali memory IP : ######## 8%
Denali PCI Express : ########### 11%
Verisity AMBA : ######## 8%
Verisity USB : ##### 5%
Verisity PCI : ### 3%
VRST PCI Express : ## 2%
Verisity PCI-X : #### 4%
Verisity 10/100 : ## 2%
Verisity SATA : # 1%
vague eVCS : ## 2%
verf IP from ARC : # 1%
verf IP from ARM : ##### 5%
And again, I'd like to reiterate those Denali numbers are low because I
meesed up my questionaire!
"Is the IP used for reference checking only, bus-functional modeling
(BFM), or to measure coverage of the standard as well?"
BFMs : ########################## 53%
reference checking : ############### 31%
standard coverage : ##################### 42%
What I found personally interesting in the user comments is the level of
suspicion and distrust users have about verification IP. Also those
who found that they were chasing bugs in the verification IP. Bigs kind
of defeats the whole purpose of buying it in the first place, no?
No, how can you trust them? I won't pass along the horror stories I
have heard about companies trusting verification IP to catch all bugs.
- Doug Hester of Chip World Consulting
We use Synopsys DesignWare sometimes eg for AMBA, but the quality does
not seem to be there. I suspect because they are giving it for free
(with DW license which most people have.)
- Samuel Russell of Ceva, Inc.
No, we hate those and we always develop our own C/FLI. If the IP vendors
don't do good jobs, you are screwed! Most of them don't understand lots
of system issues, you end up paying them and helping them in debugging
their IPs.
- Alex Chao of Topspin Communications
We've used IP for PCI (eInfoChips PCI eVC, now distributed by Verisity).
In the past we used a SPI-3 eVC from Tenesix -- bad experience.
The big problem with external verification IP is that they tend to be
written by SW developers who have read the interface spec rather than by
HW verification engineers. Thus the approach doesn't provide the APIs
necessary for HW testing. In addition the SW people don't understand
things like bus-turnaround cycles and how they affect specs and
implementations.
- [ An Anon Engineer ]
Yes. Using verification IP has been a mixed bag. We've used Verisity's
PCI/PCI-X and 10/100 Ethernet eVCS. Had to have the developer on-site
to fix the PCI/PCI-X eVC. Still didn't test everything we needed. Had
to write additional tests. 10/100 eVC was buggy also, but the developer
fixed it.
- [ An Anon Engineer ]
We don't trust verification IP.
- [ An Anon Engineer ]
Our ASIC design includes 12 IPs (6 IP types) including PCI-X and
Ethernet 10/100. For verification IP, we used PCIX IP and 10/100
IP by Verisity. We used IPs for checking complete functional
coverage, protocol compliance against standards and complete
verification and code coverage of the RTL for enhanced features.
We found both the verification IP and as well RTL IPs (e.g. PCIX
from Esilicon/Sysnopsys) had bugs and were not fully compliant.
- Inder Singh of iVivity, Inc.
No comment; generally bad experience in this area.
- Nathan Dohm of StarGen, Inc.
We develop most of our verification IP in-house, but we supplement this
with Denali models for DRAM and flash memory. These models allow us to
quickly verify against a wide variety of memory device configurations
and manufacturers.
- Mike Peters of Digeo, Inc.
No. Most verification IP is much too expensive for the simple tasks
they are doing.
- Terry Doherty of Emulex Corporation
Will use AMBA verification IP for e.g. master/slave models, protocol
checking and functional coverage. Not decided which yet, but something
more along the lines of Verisity's AMBA AHB eVC rather than
basic ARM model
- Fraser Dallas of Motorola GSG (Scotland)
We've used AMBA, but I was not involved with that project so I can not
comment much further on it. I personally have used PCI-X verification
IP in the form of what we licensed from inSilicon/Synopsys as part of
their DW-PCIX core.
- Greg Arena of Intel Corp.
We use Synopsys Designware USB 2.0 VIP as reference checking.
- Javier Jimenez of DS2 Spain
We recently designed a PCI-to-PCI bridge chip and used Synopsys's PCI
test IP. The test suite ensure compliance with the PCI standard. But
it only tested nominal cases and a handful of off-nominal ones. We
discovered that we had to supplement those tests with many more directed
and random tests. For that, the Synopsys IP provided fully-capable PCI
bus masters, targets, and a bus monitor, and a convenient scripting
language to generate many varied transactions.
- Aviva Starkman of Northrop Grumman
We have mostly rolled our own.
- Dan Steinberg of Integrated Device Technology
Denali PureSuite/PureSpec (for PCI-Express). Transactors used to drive
traffic and check responses. PureSuite (suite of tests) used for
compliance checking.
- Mark Dorland of Banderacom
We are currently using Synopsys' USB 2.0 model and have used a PCI
verification model from InSilicon in the past with good results. We
use the models to check coverage of standards and, in the case of
the USB model, to set up our own test scenarios.
- [ An Anon Engineer ]
eVCS from Verisity are in use and very helpful.
- Andreas Dieckmann of Siemens AG
Yes. PCI*, USB. Synopsys Designware.
- Winston Worrell of Microsoft
In our group we use our internal IP only.
- Thomas Langschwert of Infineon
We would like to use commercial verification IP, but since we're
integrating more IP than we are designing, the pricing model of
verification IP (the stuff with randomisation etc.) is crazy. We need
lots of seats of lots of interfaces (for chip level work). So, we're
doing our own library of simple transactors that abstract the protocols
and are powerful enough for integration work (as opposed to verifying
the IP itself). We ought to be able to buy this, but can't...
- Pete Cumming of Icera Semiconductor
We use the Synopsys DesignWare VIP for AMBA verification. The IP is used
as bus-functional modeling and to measure coverage of the standard.
- Charbel El Hajjar of Fraunhofer IIS
Yes, AMBA, USB and internal ones such as STBus. Most often used as BFMs
and monitors. We use either Verisity or internal IPs.
- Frank Ghenassia of STMicroelectronics
So far we have not used any verification IP.
- Yuval Itkin of Metalink Broadband, Ltd.
Yes, ATM, SDH. Evaluating PCI-Express, USB, AMBA. The plan is to use
for generation, monitoring, and coverage. Synopsys is currently the
only purchased verification IP that we use.
- [ An Anon Engineer ]
Yes. We use Synopsys Designware for AMBA, USB, Ethernet.
- Brad Hollister of NetSilicon, Inc.
My company use a lot of Specman, on my side I am using AMBA VIP and
developing some Vera BFM. I am a kind of black sheep.
- Remi Francard of STmicroelectronics
A lot of our internal IP is delivered along with "e" models/checkers
for use when integrating. Haven't used any external verification IP
as yet.
- Mark Curry of Texas Instruments
Denali PCI-Express BFM. Some home-grown BFM's for other busses.
- [ An Anon Engineer ]
No (actually we used one memory model out of Synopsys Mempro).
- [ An Anon Engineer ]
We do not use any external verification IP.
- [ An Anon Engineer ]
No.
- Lutz Naethke of Atmel
We use AMBA AHB Verification IP from Verisity for BFM and coverage
measurement.
- [ An Anon Engineer ]
No, we use Matlab (DSP applications), and now cosimulate the Matlab
with the design under Aldec.
- Ray Andraka of Andraka Consulting
No.
- Tomoo Taguchi of Hewlett-Packard
We use AMBA DesignWare for reference checking and BFM.
- Frank Lier of PACT XPP Technologies
We use Synopsys TWB.
- Shivi Sidhu of Crimson Microsystems
Synopsys DW VIP for USB & AMBA, for BFM.
- [ An Anon Engineer ]
DesignWare
- Luo Min of Northwestern Polytechnical University, China
We're using the AMBA verif IP from Verisity.
- Laurent Claudel of Wavecom
Yes, we buy quite a bit of verification IP. We have bought from most
of the listed vendors. The choice is based on each offering not so
much by vendor. The most widely used verification IP are memory models
from Denali. Most other verif IP tends to be 'e' based components.
- [ An Anon Engineer ]
PCI and USB. We still eek life out of the old Sand PCI model (when the
new owner of the Sand PCI model dropped support for it, we dropped them.)
This is the big problem with IP, long term support. We have to do it on
a project by project basis now. With the USB, we went to Xilinx for a
vendor, and are supporting it through them.
- [ Kenny from Southpark ]
We use verification IP tools from Synopsys for USB/PCI/AMBA. We use
for bus-functional modeling.
- Subbu Muddappa of Woodside Networks
We've written our own. The only except to this would be Denali. We use
their RAM models.
- Jay Adams of Marconi Corp.
Denali PureSpec (PCI-E): Used for checking and as BFM. I like their
models, although it seems clear that they designed their root complex to
act like a device instead of an aid to development. We are constantly
requesting fixes/features/hooks so we can test what we need to test.
Their response to such requests has generally been favorable and timely.
I'm convinced once all the kinks are worked out this will be a good
tool. In the meantime, it is distracting to have to download a new
update every week.
- Coralyn Gauvin of LSI Logic
USB. DesignWare.
- Charles Martin of BAE Systems
We build our own verification IP. Fibre Channel. We needed it before
anybody had anything available, so we had no choice, really. We have a
couple DesignWare licenses, so we would use those if we had to. Those
are pricey, though... so we tend to build things ourselves. The number
of parallel jobs that we can run is limited by the number of licenses
that are required. We already need VCS & Vera licenses for each sim
job... why add one more?
- Jonathan Craft of McData Corp.
Yes. We have Verisity eVCs for SATA and our processor bus. We are
developing eVCs internally for our own IP. We will probably purchase
more in the future as we integrate new blocks into our system. We
will also look into the Vera models that are available for PCI-X and
USB since we have DesignWare licenses.
- Maynard Hammond of Scientific Atlanta
We have our own internal verification IP for in-house protocols. It is
used as a BFM, and to measure coverage. We built it in Specman e.
- [ An Anon Engineer ]
Verification - Not much, we have to think of the overall methodology.
We've used Synopsys Smartmodels in the past with good success.
- [ An Anon Engineer ]
ARM AMBA compliance test (ACT) used to proof of our design.
- Boaz Ben-Nun of Starcore DSP
We mainly use Synopsys DesignWare.
- Gao Peng of Tongji University, China
We are considering use of Denali PCI and memory models
- [ An Anon Engineer ]
Considered using AMBA V-IP but made our own in the end, due to the
price-tag. We do write various BFMs and other V-IP ourselves, which
are re-used across projects. For the USB blocks on my current chip,
they will be ported to FPGA, with an external Phy and then simply
hooked up with some USB ports. No need to waste money or CPU cycles
on V-IP for it.
- Michiel Vandenbroek of China Core Technology Ltd.
We're using Denali PureSpec for PCI-Express verification. We're using
it for all three: reference checking, bus-functional modeling and
coverage of the standard. We reviewed Denali, Synopsys, and Cadence.
Denali was the most complete given the newness of the standard. We
were also impressed by the support they advertised (AE visits, email
support, etc.). Their response to our questions and bug reports has
been thorough and prompt.
- Ty Gallander of Conexant
Not used.
- Chandresh Patel of Ciena Corp.
ARC processor
- Ross Smith of Theseus Research
No verification IP used.
- [ An Anon Engineer ]
Use Synopsys PCI/PCIX monitor for reference check of my own PCI/PCIX
C model.
- Don Monroe of Enterasys Networks
Do not use.
- [ An Anon Engineer ]
We don't use any.
- Jerry Roletter of ATI
Yes. Synopsys DesignWare VIP PCI Express. We use our internal IP
for DDR SDRAM memory modeling.
- [ An Anon Engineer ]
We will. Still evaluating vendors for PCI-XP and 10G Ethernet.
- Sandro Pintz of Precision IO, Inc.
Nope. Write-our-own BFM for anything we model like that. (Ethernet,
Fibre Channel, PCI, CPU bridges, etc.)
- [ An Anon Engineer ]
No. We have AMBA model but not sure if it's considered verification IP.
- Hsing Hsieh of Hitachi
Denali (memory models), 0-in (bus monitors), plus sim with vendor
supplied encrypted models of chips that we have to interface to.
- [ An Anon Engineer ]
Yes. USB2.0, Ethernet, PCI-X. Synopsys (InSilicon), PLDA (supplied
with IP), Synopsys Designware. BFM and code coverage.
- Mark Andrews of EFI, Inc.
AMBA. For checking and BFM. Synopsys DesignWare.
- Joubin Djavan of Siemens
We are using memory models (Denali) and PCI-EX model (Denali).
We are using PLB toolkit (4.0) and monitor.
We don't use other verification IPs in our project. Whatever else
needed is developed internally in IBM.
Denali PCI-EX is used as BFM, as well as reference checking.
- Dorit Moshe of IBM Israel
No.
- [ An Anon Engineer ]
We do not use verification IP, although AMBA verification IP may be
useful.
- Jim Lear of Legerity
I test-drive the VIP from Synopsys. The overhead is too big that I end
up to build my own monitors.
- Edmond Tam of Global Locate, Inc.
USB, AMBA, BFM, DW
- Stefan Rohrer of Micronas GmbH
Serial RapidIO (BFM provided by RapidIO TA)
PCI Express (BFM from Synopsys)
PCI (BFM from Synopsys)
PCIX (BFM from Synopsys)
- S.K. Rajadurai of Lattice Semiconductor
Verisity mostly, they seem OK
- [ An Anon Engineer ]
No, but in future if there is a need we'll go for SystemC Transactors.
- Jithendra Madala of QuickSilver Technology
We don't use verification IP, we develop our own.
- Bill Dittenhofer of Starkey
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