( DAC'18 Item 6 ) ------------------------------------------------- [05/17/19]
Subject: Users on Empyrean ALPS as SPICE benchmarks get #6 "Best of 2018"
A NEW CONTENDER: The SPICE wars have been going on for years. With Cadence
Spectre as the main player -- and other players dominating certain specific
SPICE sub niches. Plus all the buyouts changing the SPICE landscape like
Synopsys acquiring Magma, and Mentor acquiring BDA.
For the past 10 years, whenever the SPICE users commented they'd cite Mentor
BDA AFS and Cadence Spectre a lot; that tradition continued this year.
One big shift happened in 2018, though, with an EDA vendor with the odd name
of "Empyrean" and its ALPS SPICE. The user survey word counts:
Cadence Spectre :# 51
Mentor BDA AFS :### 152
Empyrean ALPS :###################################### 1897
Synopsys FineSim/HSPICE :# 29
GOT CAPACITY, ADDED SPEED/ACCURACY: on the tech side what changed this year
for Empyrean ALPS -- judging from the user ALPS vs. HSPICE, ALPS vs. HSIM,
ALPS vs. BDA AFS, and ALPS vs. Spectre benchmarks below -- was that ALPS
is now ~3x faster vs. its rivals and is now just as accurate as its rivals.
Related side story: Empyrean ALPS was always high capacity -- but it lacked
speed/accuracy before -- so I (and a lot of other engineers) kind of didn't
think about it much.
So I forgot Empyrean ALPS in my DAC'16 Cheesy Must See List. Oops!
And at the time Jason Xing, their U.S. CEO was furious! But that was 4 years
ago. Now with these current user benchmarks it appears that Empyrean ALPS
is a new real contender in SPICE.
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QUESTION ASKED:
Q: "What were the 3 or 4 most INTERESTING specific EDA tools
you've seen this year? WHY did they interest you?"
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Empyrean ALPS
We use ALPS SPICE to verify our IC's power management system. It does
our transient/AC/DC analysis with has high accuracy at high speed.
The largest design we've used it on had ~250,000 devices.
We benchmarked ALPS vs. HSPICE,
- ALPS accuracy is the same as HSPICE
- ALPS is 3x to 6x faster than HSPICE
We also use Empyrean's Aether platform, and the ALPs interface to it
is pretty good. The waveform viewer is fast and accurate.
Overall, we like that ALPS does various analysis types, and is fast
with full-accuracy, and it helps our engineers save time and money.
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We usually use ALPS for post-layout simulation. Our designs have more
than 1,000,000 parasitics (resistors & capacitors)
ALPS is compatible with HSPICE and Spectre netlists, with much faster
simulation speed-ups.
- ALP is about 3X faster than HSPICE for a typical post-layout
simulation of 12-bit Sigma-Delta ADC.
- There is no significant accuracy difference (+/- 0.05%) between
the simulation results of ALPS and HSPICE.
ALPS is suitable for simulation of large designs, especially for
post-layout simulation. It can run an HSPICE netlist directly.
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We use Empyrean ALPS for memory timing block Monte Carlo simulations.
ALPS vs HSPICE:
- ALPS' accuracy was similar to HSPICE.
- ALPS is faster than Synopsys HSPICE. I can simulate large
memories with it, which HSPICE cannot do.
I used ALPS for memory function simulation on 6+ million devices.
ALPS vs HSIM:
- ALPS is more accurate than HSIM.
- If the simulation accuracy is not considered, HSIM is faster.
I also used ALPS for post-layout simulation of our memory compiler. I
needed to simulate 100's of instances for each corner when I generated
the compiler interpolation database. It has a 'smart matrix solver'
for post-layout simulation which gives you high speed and high accuracy,
which made me more efficient.
I'd recommend ALPS based on how it balances between speed and accuracy.
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Empyrean ALPS works for analog or mix mode simulation, similar to HSPICE
or Cadence Spectre. I've only used ALPS for ~ 120K devices (though
Empyrean claims ALPS can handle over 10 million devices.)
1. Simulation Time. ALPS' simulation time is much faster than
other SPICE simulators. I believe it's related to their Smart
Matrix Solver.
2. Accuracy. ALP's accuracy is comparable to HSPICE & Spectre,
based on our simulation comparisons.
I use ALPS command line analog interface. It is as easy to use as other
simulation tools.
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We tested Empyrean ALPS with netlists in 2 different types of SPICE
languages (Cadence APS and Synopsys HSPICE) without any modification
required. We only had to adapt our netlists when we used some
specific Verilog-A functions.
- ALPS was at least 4x faster than our 2 current SPICE simulators.
In some cases, it was almost 8x faster.
- Overall, ALPS' accuracy of results were very close to our true
SPICE simulator, usually within 0.001%. But in a few rare cases,
we saw ALPS results differed by ~ 5%.
- As for capacity, ALPS worked fine in our test cases with up to
200,000 devices.
I would recommend it, as the speed-up we get from ALPS allows us to get
higher verification coverage in our Analog/Mixed-Signal designs.
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Empyrean ALPS True SPICE Simulator
We are using it for our analog product design as a sign-off simulator.
Inputs: SPICE input file and models compatible with CDNS/SNPS/MENT
standard formats
Outputs: Log, circuit-check report, and wave-files that are
compatible with standard CDNS/SNPS/MENT formats
The graph below shows our typical performance benchmark times between
Empyrean ALPS and other major SPICE simulators. (SORRY JOHN: We have
to be vague out of fear of vendor retribution.)
ALPS is 2X faster than "Simulator A", our preferred SPICE simulator.
The test data below is a small DCDC convertor -- but we found almost
the same result (2X faster) with most of our other benchmarks.
"reltol" is an option of SPICE simulator.
"reltol=0.0001" means high accuracy mode,
"reltol=0.001" means moderate accuracy mode.
For accuracy, our benchmark found the difference between ALPS and
Simulator A is about 0.02% to 0.2%, even for the MAX difference
during Tran analysis.
We used to be "Simulator A" power users (I should say we still are
publicly); however, ALPS' accuracy convinced our designers to change
to their simulator.
Empyrean ALPS has a "Smart Matrix Solver" option that we use to cut
simulation time during post-layout simulation.
- Generally, the "RC network reduction" method is used for the
same purpose, however, it affects the accuracy when the
reduction-rate is high to get a good enough simulation speed.
- With "Smart Matrix Solver", we can reduce our post-layout
simulation time without losing accuracy.
We use ALPS with Empyrean's Aether analog design platform for our entire
analog simulation with LSF.
We had evaluated Empyrean for a long time. Their product has continued
to improve over time.
(Again, sorry for being vague, but I have to.) For engineers who
currently use the "other" major design platform, I believe it would
be easy to also use ALPS because ALPS can read the netlist and models
that are compatible with industry standard formats. The users should
know SKILL or TCL programming if they want a tight interface with
their platforms.
As for recommending ALPS, I want to say "No" -- because I want our
competitors *not* to use ALPS, and to instead buy expensive other major
simulators.
But joking aside, I think ALPS is an excellent true SPICE simulator.
It's high performance, accurate, and low cost. I do recommend it.
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We use Empyrean ALPS.
It's compatible with SPICE and Cadence Spectre. It reads circuitry
from a text netlist file. Model files may be included as well and it
uses numeric methods to solve set of equations based on the netlist
to predict circuitry behavior.
Here's our 3-way SPICE benchmark:
APS+HPA = Cadence APS plus "+postlayout=hpa" for best speed
AFS = Mentor BDA AFS
ALPS = Empyrean ALPS
(click on pic to enlarge image)
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We did 27 runs to cover all corners of our circuit. Our baseline was
Cadence APS+HPA. BDA AFS had an average frequency error of roughly
0.1% and was 2.04x faster. Empyrean ALPS had an average frequency
error of roughly 0.2% and was 5.26x faster.
We use the ALPS Smart Matrix Solver for our post-layout simulation.
As far as I know, all SPICE simulators use numeric methods to solve
nonlinear equations.
f1(x1,...xn) = 0
f2(x1,...xn) = 0
...
fn(x1,...xn) = 0
They use current solution Xi=[x1,x2...xn] and calculate down to
dx[dx1,dx2...dxn] to get next solution Xi+1=Xi+dx. If the next
solution meets convergence requirements then stop.
Two very important steps to reduce iteration and improve simulation
speed are:
1. choose right algorithm to assemble matrix A to solve A*dx=0.
2. solve A*dx=0 quickly and accurately.
Empyrean's smart matrix solver has improvements on both steps which
is why it is faster.
Cost is important to us -- and time is cost too.
- ALPS' faster simulation speed cuts our design cycle time
and simulator license peak usage.
- Its accuracy is essential to reducing our risk that our
design performance is out of spec.
We do not use Empyrean Aether. We've found ALPS integrates into
Cadence ADE easily. You just define the environment variables,
load one setup code into the ADE platform. These two steps can
be automatic, then done.
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I nominate ALPS SPICE.
Reads in both SPICE and Cadence Spectre netlist and language. Can
generate tr0 and fsdb output format. Supports Verilog-A models too.
We used it intensively and almost exclusively for our analog designs.
Both accuracy and performance are great.
ALPS-MS is their mixed-mode simulator which we used for our whole
chip mixed-mode simulations.
We have used Aeolus/ALPS (Aeolus was the previous generation of ALPS)
and Aeolus-MS/ALPS-MS for about 8 years. We've taped out 100+ products
based on these simulators.
CAPACITY
We have some large post-layout extraction netlists. ALPS handles them
well. Here are statistics for 3 cases.
-Case 1-
vsource : 5 resistor: 6493317 diode : 742276 mosfet: 328344
-Case 2- (No RC reduction for extracted netlist)
vsource : 4 resistor: 6083301 capacitor: 619650 mosfet: 140023
inductor: 8 diode : 240330 bipolar : 106
-Case 3- (No RC reduction for extracted netlist)
vsource : 70 isource : 1 vcvs : 4
vccs : 2 resistor: 18683084 capacitor: 718996 mosfet: 23929
inductor: 1 diode : 44578 bipolar : 120 jfet : 2
PERFORMANCE
I do not have recent comparison data, since we do not have latest
version of other true simulators.
- 2011. We started to use Aeolus/ALPS from 2011. We can compare
it with old Spectre (v2009). We did some evaluation with
Aeolus (v2010) against Spectre (v2009) back in 2011. Aeolus
performance was pretty good at that time.
- 2018. Empyrean has improved the simulator every year. ALPS
is much faster and better than Aeolus now. I simulated two
cases below. The first case is pre-layout netlist and the
second is a post-layout netlist with parasitic RCs. The run
time is summarized below.
2013.12.sp2 2017.12.sp2 Improvement
Case 1 6.8 hrs 3.3 hrs 2.1X
Case 2 41.0 min 17.3 min 2.4X
Aeolus v2013.Q2 speed was about 2x to 3x faster than v2013.Q1. So it
has improved closer to 4x to 6X over the past 5 year period.
With the new ALPS version, we can run post-layout netlists during design
in reasonable time. (In the past, we could not verify them during
design, due to the long simulation time.)
The new enhancement over the past several years -- I forget whether they
call it smart matrix solver or something else -- boosts the performance
quite a lot. Some circuitry is sensitive to layout, and now we can do
more verifications on them based on extracted netlist.
ACCURACY
In 2011, we benchmarked Aeolus with Spectre, and did not see a
difference in the results between them. As the ALPS simulator has
evolved over the years, its accuracy remains consistent.
Most important is that our ALPS simulation results are silicon proven.
Our 100+ tapeouts have confirmed our confidence in it.
USING ALPS IN OUR SIMULATION ENVIRONMENT
Our main platform is Aether, which is similar to Virtuoso ADE. It is
quite straightforward to do simulations in it. We've only designed a
few products in Virtuoso ADE, but the ALPS simulator can be started in
Virtuoso ADE environment, too. Just switch the simulator to ALPS and
press the button.
If you prefer running simulation through command lines, running ALPS is
just like running HSPICE in the old days -- very simple and easy.
As a long-time user for Aeolus/ALPS, I highly recommend it. (As long as
you don't need a lot of RF features, as it does not have enough RF
support right now).
Its overall performance and accuracy is super. In addition, Empyrean's
support team is very helpful and efficient. The return from our
investment has been pretty high.
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We like ALPS capacity. We're thinking of having them come over.
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Empire ALPS
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MENTOR BDA AFS, CADENCE SPECTRE, SYNOPSYS FINESIM
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For our SRAM circuits BDA AFS is primo.
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Mentor AFS should be in your top 3 list.
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Ravi's AFS guys still gives us amazing support.
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We're a BDA house.
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We buy AFS and FineSim licenses in bulk.
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Bought our original BDA AFS licenses from Ravi in 2008.
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BDA AFS.
Oops. Mentor AFS.
Oops, again. Mentor, a Siemens business, AFS.
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Ravi would s*** a brick if I said anything other than his BDA AFS.
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We use a mix of Spectre and AFS licenses.
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AFS is more accurate; Spectre is cheaper.
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Spectre-XPS and Altos. We design memory circuits
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Spectre. It works.
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Cadence Spectre-XPS and Cadence Altos for SRAM.
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Magma FineSim Pro
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Still use Magma FineSim.
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Synopsys HSIM. I think we're the last Nassda customer remaining.
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