( DAC 04 Item 39 ) --------------------------------------------- [ 02/09/05 ]
Subject: Sagantec and RubiCAD
KA-CHING! -- Do you hear the sound of that money printing machine? That's
what happens if your arch rival, RubiCAD, goes under. (RubiCAD filed for
bankruptcy rather than pay for a patent APM Design Labs owned.) So now:
Dataquest FY 2003 Process Migration Market (in $ Millions)
RubiCAD ############## $5.9 (49%)
Sagantec ########## $4.0 (33%)
Tanner Research #### $1.3 (11%)
others ## $0.8 (7%)
hypothetically becomes:
Dataquest FY 2004 Process Migration Market (in $ Millions)
Sagantec ######################## $9.9 (82%)
Tanner Research #### $1.3 (11%)
others ## $0.8 (7%)
This begs the question of how long will this $12 million market will remain
unchallenged?
Sagantec
The Anaconda tool is a layout compactor that produces DRC correct
designs and is tightly integrated into the Virtuoso XL editor through
a custom menu selection. Pcells or primitives may be used for
compaction.
There's a constraint menu and graphical entry to control how devices
get moved. Constraints may also be entered on the schematic too. VXL
from Cadence may be used, but is not required.
Layout migration is common for Anaconda including X and Y compaction.
The compactor understands analog concepts like symmetry, differential
pairs, alignments, proximity rules, net widths, and composite
constraints. Anaconda is used either stand alone or inside Virtuoso.
There's an auto finger for layout.
- Daniel Payne, Consultant
I've been using Sifix for over a year now. With no prior experience
using compaction engines, it took 6 months to get comfortable using
this tool. I'm still learning things about it that I didn't expect.
Our application is DRC fixup on a high performance, full custom, fully
hierarchical, 65nm design. The Sifix application that I've developed
is completely command line driven so I have no experience driving
through the Sifix GUI or with the Cadence Virtuoso interface.
Okay, here's my feedback on SiFix.
+ The combination of the rich set of layerops and the perl interface
to the DB was more that sufficient for me to handle all of my shape
manipulation needs. The set of layerops is very rich and mostly
intuitive.
+/- The Perl interface is extremely useful but takes a little getting
used to. The function calls are somewhat verbose and it's not easy
to remember which functions take object handles and which take
strings. There is not a published database schema so you have to
figure this out as you go.
+/- Sagantec has done a good job of defining how the layerops work
through the hierarchy and where the resulting shapes end up. This
is fairly well documented but not entirely intuitive at first and
takes some experimentation to get used to. Once understood,
hierarchical layer manipulation is useful and works well.
- Because of the way the layerops are defined in the context of
hierarchy, moving shapes up the hierarchy is a very cheap operation,
but pushing shapes down the hierarchy can be very expensive. This
becomes important for designs that have multiple instantiations of
a child cell which requires a "common" representation of the parent
context to be pushed down to the child instantiations. The biggest
performance and memory bottleneck in our flow is pushing shapes
down through the hierarchy.
+ SiFix only has 10 predefined rules. They can be combined with
various conditions, priorities, and values in order to create some
fairly complex rules. The syntax for specifying the rules is fairly
straightforward and the rules and conditions are intuitive for the
most part, so it is very easy to code up rules for specific
conditions and get it to work. In fact, the overall usage of SiFix
is fairly intuitive.
+ Perhaps the one thing I appreciate the most about the Sagantec
tools is that they don't try to hide what's going on underneath
the covers. Most users would never need it, but you have access
to the state machines that are defined for each rule. This gives
you more insight into how the compactor runs and also gives you
the ability to define your own state machines for more complex
rule situations if needed.
- SiFix use the CIF format as their base ASCII representation. This
language is easy to understand but is not rich enough to easily
represent all the design information that needs to be preserved.
I've had to write up a number of workarounds to preserve design
information through the flow.
+ Sagantec has provided a number of things to make debugging fairly
easy. The flow is structured to be checkpointed and restartable at
any point. The graphical viewer provides a number of capabilities
for navigating through the design hierarchically and identifying
the various constraints.
- The graphical viewer is very powerful for debugging however it
lacks the ability to make simple shape manipulations such as
removing shapes which would be very useful for debugging.
+ The compactor itself seems to be very fast and memory efficient.
For our flow, the memory and performance intensive operations are
in the hierarchical shape manipulations. Once the jobs get into
compaction we're home free.
+/- The documentation is fairly complete for most operations
however it seems to fall short for some of the more complicated
applications. The examples are fairly simplistic and there seem
to always be some undocumented side effects. I've found the AE's
to be very knowledgable and responsive so this has not been much
of a problem.
- The syntax allows macro capabilities but there seem to be some
problems if variable names are reused. The syntax also contains
eval capabilities but the application seems to be somewhat
limited and consistent.
+ There are the classic examples of trying to apply a 1-D compactor
to a 2-D problem (area rules, orthogonal via coverage rules, etc).
SiFix has additional rule conditions that allow you to do some
"pseudo-2-D" rules that seem to be fairly effective.
I may have missed something here, but bottom line is I like the tool.
- Tony Fourcroy of Intel
I have 9 yrs of physical design migration experience. Previously, I
worked at RubiCAD for 7 yrs. Now, RubiCAD is gone though.
I have not evaluated BindKey RapidDRCFix, only seen their demo at DAC.
BindKey claims their tool can handle whole chip of millions of gates.
Existing Sagantec tool SiFix cannot handle that size, but Sagantec
plans to handle it in their next version which will be sometime this
year.
Speedwise I do not know which one is faster.
One feature missing in SiFix is automatic jog insertion/creation,
whereas BindKey people claims that their tool can insert jogs where
necessary.
Sagantec has excellent support. They have dedicated AE for each
customer on site everyday, which is a big help.
Cadence newly bought VLM from Q-Design has 2-D algorithm, which will
take more memory compare to SiFix and RapidDRCFix, so I don't know if
Cadence is able to handle whole chip or not.
Right now, SiFix is better overall.
I am sorry if this sound favorable towards SiFix, but that is the
truth. If RubiCAD was here, I would be able compare more.
- Juzer Fatehi of Qualcomm
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