( DAC 03 Item 34 ) ----------------------------------------------- [ 01/20/04 ]
Subject: Silicon Canvas Laker
THE TAIWAN CONNECTION: In the rivals-of-Virtuoso department, Silicon Canvas
has had the most success using its connections to the Taiwan fabs to garner
customer mindshare. UMC, SiS, and (of course) TSMC are all Laker supporters.
Laker's early adopters seem to like mostly them, too.
The Laker tool is excellent in what it is intended for - custom layout
design driven from a netlist. Its strengths are ease of use, lots of
clever design aids like circuit visualiser (it shows you what your
circuit is from a netlist) cross-probing, and auto-placer of transistors
conforming to standard cell boundries.
The only rival I see to Laker is a resurgent Magic VLSI editor (the
venerable free editor now supported by Tim Edwards with a bit of
financial support from my company).
All the other layout tools I have seen are totally rubbish - they are
written by people who never have to lay out a circuit.
The support from Silicon Canvas is pretty good considering it is a fairly
low-cost product and we only bought one copy. When our company had a new
technology file requirement Silicon Canvas had someone come on site and
worked hard to create the tech files we needed for the new process.
The most annoying deficiency in Laker is a lack of proper circuit
extraction ability and a cast-iron DRC checker. You still need tools
like Calibre and Dracula. Until Silicon Canvas addresses this, they will
be competing with other vendors who are prepared to 'throw in' the
polygon pusher tool for free along with the other stuff.
- John Wood of MultiGIG, Ltd.
Here's my take on the Laker tool (Silicon Canvas). This comparison is
mainly with Laker and Cadence though I've used Tanner tools and, CALMA
gdsII and Applicon (old school).
First, we're a start up company with 2 mask designers (peaking with 4
contrators at tapeouts). Full custom layouts. Currently running
Laker 3.v05 on Linux 7.3; with Calibre (LVS/DRC). In the process of QA
for Laker 3.v09.
Schematic entry:
Laker - Reads in from a netlist from a ViewDraw schematic, but the
resulting "laker" generated schematic doesn't look like the original at
all even though it's logiclly correct. So it's hard to see/identify
diff pairs, clock lines, etc... that would be obvious in the original
schematic. Laker tells me they have a road map to resolve this.
(Q4 2004?) with their own schematic entry tool. Pick and place works
really well for quick transistor placement. If you have too many
transistors the fly lines could cloud up your layout view. Changing
net properties are easier in Laker.
Cadence - At my previous company we didn't get the Virtuoso VXL tool
working very well. We started a couple of projects with it but abandoned
it within the first few months. And we had a dedicated CAD team to help
us out. Changing net properties is a headache, everything seems to
be hard coded, so you need to delete and recreate.
Tool:
Laker - Quick learning curve. Takes about 1 week with prior Cadence
experience.
Cadence - have always used it.
Online DRC:
Laker - Pretty comprehensive; checks 95% of Calibre DRC's. Can't use
the same runset as Calibre, so updating 2 runsets can get messy
sometimes. There's an interactive DRC that runs while you're editting
which is pretty slick, but uses up some of your computing resources.
Cadence - Haven't used it.
Pcells:
Laker - Easy to use, and modify; everything is in the one techfile.
Guard rings are parameterized too so they're stretchable, remove
metal/contacts, and can be widened. Transistors are easy to place
and modify for ECO's.
Cadence - Things like guard rings are built from a skill program and
are not flexible. If a change needs to be made, its delete and recreate.
Pcells need a seperate person to maintain a library.
Interface:
Laker - tcl
Cadence - Skill; need I say more?
Support:
Laker - Very easy to work with; quick reponse time. Don't need to keep
track of bug report numbers, or go though a bug report list. This is
probably because Laker is a lot smaller that Cadence.
Cadence - If you're not Intel, you can get lost in the system unless you
know people who work there personally.
- Steven Suwabe of KeyEye Communications, Inc.
Laker's strengths/weaknesses. Please note that I've only used Virtuoso
among all the competitors of Laker.
Strengths:
1. speed, speed, speed: This is a big one. It used to take hours to
stream in/out large databases. Now it only takes minutes. And since we
run Laker on Linux machines, which typically have better graphics cards
and faster CPUs compared with Sun machines, interactive jobs feel quite
a bit faster, too.
2. very handy design rule-driven layout editing. Most of the layouts are
now DRC clean by construction because Laker notifies you of any potential
design rule violations on the fly. It's especially helpful when drawing
long wires in congested areas: Laker notifies you of any shorts, which
may not be easily identified with human eyes in Virtuoso before LVS.
3. quick net highlighting that traverses design hierarchy as well. We
used to have to use some kind of script to do net highlighting in
Virtuoso, and it was slow. Now net highlighting is built-in in Laker,
and it's fast & convenient. It helps a great deal when we try to trace
wires /nets during ECO.
4. lots of small improvements on commonly used layout tasks, such as auto
alignment; built-in logo editor, etc.
Weaknesses:
1. some minor commands are not 100% compatible with Virtuoso. I believe
Laker covers 100% of Virtuoso's command, but sometimes the key mappings
are not 100% identical. Some of our old layout engineers complained
about it.
2. name recognition. Engineers are reluctant to try out new tools. Laker
is still not well-known relatively speaking. Our project leads sometime
still need to spend time trying to convince older engineers to try Laker.
3. This is less of a problem now, but in the past we had to take Virtuoso
technology file and asked Silicon Canvas to convert it to their format.
Direct foundry support was not as good in the past, but it's catching up.
- Ching-Han Tsai of High Bandwidth Access, Inc.
Laker's big benefit is speed on StreamIn. 20%-30% faster than Virtuoso.
Panning, redrawing and going to the coordinates are quick tasks. Don't
feel pain on Laker; a little pain on Virtuoso.
Laker's Hierarchical NetTrace really helps to find out layout problems
and it's very quick. I don't remember Virtuoso has this function.
The User interface is very similar between Laker and Virtuoso. I mainly
use Calibre-RVE and the setting is already in Laker, but need to setup
by myself in Virtuoso.
So far, I'm not so happy to use Laker's TCL script. For example, when I
want to attach all text pin names on chip bonding parts, all TCL lines
show up in Laker main window and I can read the lines because of slow
speed. It took 1 second on per line and total pin number is over 1000.
Of course, I killed the job. Maybe there are some tricks, but I feel
SKILL is matured better than Laker's TCL script.
The latest Laker can handle DEF/LEF flow, but we need to make a design
rule file (like Metal1 spacing, width, connection information, etc...),
though Laker load lef technology file. All design rules are already
defined in LEF technolog file, but need to define the almost all
same information in Laker special format.
- Mats Matsuo of ATI
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