( DAC 03 Item 8 ) ----------------------------------------------- [ 01/20/04 ]
Subject: CoWare, LisaTek, Target Compiler, Prosilog, VaST, Y Explorations
NO APPOLOGIES: CoWare & LisaTek lead the charge in providing SystemC tools
for architectural design. In this niche, their biggest rival isn't chip
designers (because they're not architects), but the architect's own home
grown set of internally developed C libraries and C coding techniques.
The other new rivals CoWare & LisaTek are facing this year is the problem
that Cadence/Synopsys/Mentor are weaving in free SystemC support into their
ship of the line Verilog/VHDL simulators.
I have experimented with CoWare ConvergenSC in two different
projects/groups. In the first one: developers had tendencies to use
free (OSCI SystemC) and home grown tools, and the CoWare tool was an
after thought and the value was not there. In the second group/project
the developers extensively used CoWare tools to develop their
product/simulation and the tool effectiveness and value to the group is
high. My personal opinion is that as with any tools, the most important
part of a tool to be effective is the need for the tool.
As I looked at these tools in mid year:
Synopsys SystemC
- better GUI, library of components and Windows support. CoWare is
only in Linux.
- CoWare has much better SystemC implementation, library and SystemC
compiler. Synopsys uses the OSCI simulator with few changes.
- CoWare tools allows you to stay SystemC compliant, so that you can
move to another SystemC lib, such as OSCI-SystemC, Synopsys, etc...
- Synopsys has "proprietary component interfaces".
- Synopsys lib allows the use and later direct synthesizing of
existing models.
Cadence NC-SystemC
- they just acquired CoWare SystemC libraries and compiler. That
says enough.
CoWare ConvergenSC delivers on performance, allowing the user to stick
to the SystemC standard and has been good supporting the groups. CoWare
must develop a nice GUI to their tools and simulation environment. The
Bus-Compiler and GUI they have developed does not pass the "laugh test".
Windows support is a big issue, since most engineers have a Windows
Workstations. GUIs and Windows support sell products and are much
easier to show-case, justify and buy by management. GUIs that allow the
developer to easily break and regenerate the simulation model are useful
too. Presently a user must develop code.
- [ An Anon Engineer ]
High Level Design/C Based Design
Prosilog sells a graphical tool that helps you build platforms with
SystemC (output is VHDL or Verilog netlist). It automatically generates
interconnect compliant with the VCI or OCP standards. Their tools also
allow co-simulation of SystemC, Verilog, VHDL and SPICE. They also have
translators from SystemC to either VHDL or Verilog, and can go from VHDL
to SystemC (Verilog to SystemC is coming in 4Q03).
Future Design Automation sells a tool to translate ANSI C to Verilog RTL.
Applied Wave Research Inc. sells a tool that can do very high level
simulations of communications systems to allow mixing of analog,
microwave, etc. to simulate things like bit error rates.
CoWare sells tools for C-based design, particularly design of platforms.
All tools now use native SystemC. The say their simulator is 20% faster
than the reference simulator at high level and 5X faster at a cycle
accurate level. Their tool does analysis of bus traffic, cache hits, etc.
It has automatic wrapping of SystemC for co-simulation with VHDL or
Verilog using NC-Sim or VCS (Modelsim is coming). They also acquired
LisaTek, which has a tool to automate ISS generation (linkers, etc. - no
compilers yet).
Y Explorations, Inc. sold a tool that would be great for picking a piece
of IP and inserting it into your system, assuming there was a big library
of IP modeled for your system. The problem was that no such library was
ever created. They now aim the tool as a C to RTL synthesis tool. They
use a variant of C called HyC, which adds constructs to express latency
and throughput in cycle accurate C. The tool automatically generates
interface logic for your design.
Tenison Technology EDA sells a tool that translates VHDL or Verilog
into C/C++.
Target Compilers takes a description of a processor in their nML language
and uses it to create a compiler, assembler/disassembler, linker and
instruction set simulator. Their Go tool creates synthesizable VHDL from
nML. Their Risk program generates assembly level test programs for your
core. They feel they compete against Tensilica and Arc but are more
programmable.
Archelon sells a tool to create quick and easy C compilers. You create
two files that describe your processor and desired compiler (maybe 1000
to 2000 lines) and out pops the compiler. New for this year is global
optimization. They claim they create better, faster code than competitor
Target Compilers, and say one recent customer benchmark proved it.
ACE (Associated Compiler Experts) sells software for compiler development.
Their new release supports software pipelining and in-line assembly
(important in DSPs) and supports C++/SystemC.
Trolltech (Norwegians love trolls) sells a tool for writing platform
independent C++, and have a GUI maker for "internationalization" (porting
to other languages).
- John Weiland of Intrinsix
In 2001, we were looking for a C compiler for our highly parallel VLIW
architecture called OnDSP -- formally being designed with Systemonic,
acquired by Philips in 2002.
It should be noted, that the C compiler was mainly indented to support
control code processing. Thus, the instruction set visible to the C
compiler resembled very much a standard single-MAC DSP. We were
carefully investigating the available tools in the market, which were at
this time beside Target ACE Compilers, Tensilica, and LisaTek, which was
at this time only a research effort. The comparison has been conducted
against our proprietary C compiler.
Technical assessment:
From our perspective, all vendors had their individual strengths and
weaknesses:
ACE Compiler's Cosy framework was already well established, and promised
to have a variety of compiler techniques being already addressed.
Especially, the open compiler frame-work showed a very flexible
technology. In the end, the main concern was the required adaptation of
their flexible frame-work towards our architecture. In addition, we did
not have proof that it could work for our architecture as well.
Tensilica did not offer a stand alone C compiler suite, but a complete
Extensa-DSP + tools. As the performance of this DSP did not match our
requirements, we did not continue the evaluation in the context of C
compiler.
LisaTek offered a very flexible simulation frame-work providing also an
assembler and debugger. However, at the time we made the decision, the
C compiler support was not available.
Target's compiler offered an evaluation phase of Checkmate, by
providing us a C compiler for our architecture, which we used for
benchmarking against our existing solution. It was superior in both
performance and code density. Thus, we decided to move ahead.
Target Experiences:
- The Target technology can be optimally exploited, if the targeted
DSP architecture can be easily expressed in their description
language nML.
- In contrary, exotic architecture features as our VLIW compression
scheme could not be addressed by this framework. In the final
product, we added some low level tool support from our side to
address this.
- Target technical support was very good, providing very detailed
technical expertise to the customer. Reaction time was satisfactory.
The tool chain looks very complete, including (dis-)assembler,
debugger, simulator. We were missing sometimes proper interfaces to
allow the interaction with proprietary tools. Some interfaces were
added with new compiler releases.
In summary, we were very satisfied with Target's technology delivered.
Especially, the very competent and easy going technical support allowed
a seamless integration into our existing tool chain. Due to the support
of adopting their C compiler to our architecture, the business
relationship was straight forward and our technical involvement could be
kept limited.
Target is able to address the changing DSP architecture demands with
their technology as well, they are from our perspective a very
attractive compiler vendor also in future.
- Matthias Weiss of Philips Semiconductor Dresden
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