( DAC 01 Item 40 ) --------------------------------------------- [ 7/31/01 ]
Subject: NeoLinear, Antrum, Barcelona, Analog DA, ComCAD
ANALOG SYNTHESIS: Two years ago, Gary Smith of DataQuest said "Yes, we're
going to automate analog design, but it'll be 2004 to 2006 before we get
there." Despite the minor media hype generated from Joe Costello being
associated with Barcelona, so far from what most users are saying this year
these analog synthesis tools aren't ready for the big time yet.
"Analog synthesis: IEEE Spectrum ran an article on analog design tools
in the June issue. I have to agree with nearly everything said in
it (since I wrote it). Summary: useful."
- Beth Martin of Adaptive Silicon
"The new analog synthesis tools demo well, but I'm going to wait to see
if they actually solve real problems. I'm somewhat skeptical. A TSMC
salesman told me that they get analog masks iterating late into the
alphabet (i.e. mask revisions Q, R, and S). I think mask costs are
one reason you don't see much deep sub-micron analog."
- Bill Cox of VI ASIC
"Barcelona Design
----------------
Barcelona has developed a language for describing analog circuits for
numerical solution. Once an analog cell has been described in this
language (Magos?), their tool uses equation-based optimization to
develop the circuit based on a detailed description of the silicon
process technology characteristics. You still have to simulate it for
verification, but all of the up-front circuit design is performed by
the tool. It is not a tiler. It is not using pre-existing circuits
to create the circuit. It generates the circuit (schematic + layout)
across specified process corners considering all inputs simultaneously.
It spits out a Verilog model, SPICE netlist, schematic, and GDSII.
I obviously couldn't get under the hood during a DAC demo, but I did
get that it takes them about 6 weeks to absorb a new process
technology. While they have a broad set of 'simple' analog cells
(like op amps, dac's, adc's, etc.), it appears to have taken them
about 1 year to develop the PLL they were demoing. Looks to me like
a fair amount of their staffing is analog cell designers, but I didn't
get a count. I couldn't fully evaluate the resultant PLL circuit, but
the specifications and parameters required looked far more detailed
than the specifications we give our suppliers now for PLL's (pwr, peak
jitter, cycle-to-cycle jitter, static phase error, phase margin, duty
cycle error, ref freq, pwr supply, noise, ...)
It also looked to me like they had a handful of I/O's (PCI, DDR...)
Apparently one or more of our ASIC suppliers are looking at Barcelona
to off-load their analog design resources. They would not use them
on leading edge analog design, but believe they could use Barcelona
for more well-defined analog design problems.
They're at 30 employees in Sunnyvale."
- [ An Anon Engineer ]
"Last time I checked Barcelona, the synthesizable circuits were very
limited, and so simple that I wouldn't pay very much to have them
perform the design. I can whip up an op-amp like this in a few hours,
and it can be laid out in a few hours as well. Next time I need an
op-amp, I just modify it. Most of the design time is spent in
simulation to verify its performance under the conditions that I
expect it to see. To my knowledge, none of the analog synthesis tools
can help with this task. I'll keep my eye on these tools, though,
because they are just evolving, and I think they will be of some use
in the future."
- Todd Moyer of Pixelworks
"We just bought Antrim AMS and I can tell you that they are going to
kick everybody butt. Those guys are have a very sophisticated
technology. The best part is they talk design methodology first, and
then talk about their tool. There really ought to be some other word
than analog synthesis. Antrim has very good capability built in."
- [ An Anon Engineer ]
"Tools from Antrim Design and ComCAD take a netlist and produces a sized
netlist. Antrim's tool can take multiple test benches for measuring
your desired specs. ComCAD's can work with Cadence or Mentor
schematics.
Analog Design Automation goes netlist to sized netlist (I think) but
doesn't take requirements for how to optimize your circuit. It gives
you a bunch of answers, like fastest circuit, lowest power circuit,
most linear circuit, etc. and you pick the one you like best.
Neolinear takes an input schematic, SPICE models, test benches and
functions to compute an evaluation of each design alternative. It
sizes the netlist and actually does layout as well.
Barcelona Design doesn't trust you to come up with a netlist (a wise
precaution for some designers I've worked with). You click buttons on
a form and it picks a netlist from its library, sizes it and does
layout. Last year all they did was op amps. This year they have DACs,
PLLs and RF circuits. ADCs are coming."
- John Weiland, Intrinsix
"NeoLinear - very nice and ready for use but needs first proper
integration with Cadence OPUS environment."
- Dan Clein, PMC-Sierra
"Analog DA -- these guys have the best position in the analog synthesis
slot, since they are engine independent. And they are output GUI
independent (if you use it with Veritools Undertow product). They
avoid 90% of the polticiking at the customers about device level
simulation."
- [ An Anon Engineer ]
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