( DAC 01 Item 37 ) --------------------------------------------- [ 7/31/01 ]

Subject: Sagantec, Rubicad

SIZE DOES MATTER:  Let's say you already have fully debugged design already
nicely working in 0.25, but you need to have it working 0.18 -- then you'll
be doing process migration.  And Rubicad or Sagantec will be your tools.


    "Compactors/Expanders

     Rubicad and Sagantec makes compactors/expanders, which can be used to
     modify layouts for new layout rules, or take a loose layout and make it
     as small as possible.  Sagantech sells a tool that does crosstalk
     analysis and correction, but it currently has no static timing analysis
     capability, so there will be a lot of spurious results from nets which
     are coupled but change at different times."

          - John Weiland, Intrinsix


    "Sagantec -- It is nice to see after 3 years at DAC that SiClone is
     finally out and seems to work pretty well.  I think it should play
     well for the IP providers as it will allow for legacy blocks to be
     moved and still be compatible with most of the hierarchical
     verification tool and RC extraction/back annotation scripts in place.
     Ihis is a big plus for the IP/fabless guys.  Too bad Avanti
     (Hercules->Venus) & Cadence (Vampire->Assura) shifted their
     hierarchical verification runtime tree list processing so even if
     the correspondence point were the same they still do not match.   They
     also have a pretty cool analog compactor that seems to work better
     than dealing with the NeoCell and Virtuoso XL stuff."

          - [ An Anon Engineer ]


    "SiClone re-produces the original hierarchy of the design, wide wires,
     and other custom constraints, and produces *clean* final layout in a
     week that would have taken several months to re-create by hand layout.
     Wire lengths were reduced up to 10% and areas up to 20% when compared
     with a linear or optical shrink of the same layout."

          - [ An Anon Engineer ]


    "This year Sagantec made an effort to focus on accelerating full custom
     design to help 'real guys' that do custom layout do their work faster
     and easier.  This is a design space that has relatively been neglected
     by the EDA industry.  They formally introduced SiClone - the new
     hierarchical migration/optimization product and showed how it can help
     people that design full custom CPUs, memories and analog/mixed-signal.
     The biggest winner is the "on-line compaction" concept.  They gave away
     a copy of the new IP reuse book, personalized by the author: Peter Rohr.

     Rubicad is nice but no news - free LINUX poligon pusher !!!"

          - Dan Clein, PMC-Sierra


    "Rubicad - auto DRC fixer - their code is tested solid and very fast.
     It does a great job with complex rule fixes as well as antenna / SI
     correction problems.  Since it is cross platform (Linux/Sun/HP), it
     is reasonable enough to float out to the layout community.  Too bad
     it only works with THEIR DRC/ERC program so none of the foundries
     have runsets to generate the cleanup flags.  If it could read
     Calibre/Hercules output, then it would be a killer product."

          - [ An Anon Engineer ]


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