( ESNUG 592 Item 03 ) --------------------------------------------- [10/05/22]
Subject: Tony on Alphawave's connectivity IP & "miracle" IPO in only 4 years
The live DAC'22 Troublemakers Panel
Cooley: Tony, welcome to the Troublemakers panel.
Tony: Thanks. Good to be here.
Cooley: Your Alphawave IP company in only four years, went from founding
to "miracle" IPO. And you made tons of money, and everybody's rich
and happy. What can you do in four years?
Tony: It's actually less than four years. So, I think it's sort of a
perfect storm of a focus on the right market with the right
technology, and it's always about the right team as well.
You've already heard from the panel what a bottleneck I/O within
the data center can be. Connectivity within the data center --
that's where Alphawave focused starting right in 2017.
And today, over 80% of Internet data traffic is within the data center.
So, I was very pleased to hear stories about 2 to 200 *terabytes*
of data being shuttled between storage and computers.
[ EDITOR'S NOTE: When I asked "what companies do you mean as data centers?"
My backroom Alphawave tech guy answered: "you know... hyperscalers."
"OK, what are hyperscalers?" "I can't tell you. You'll have to Google
it." (I googled it.) "You mean like Facebook, AWS, Microsoft Azure,
IBM Cloud, Google, Baidu, Alibaba?" "I'm not allowed to say who our
customers are, John,... but you sure have a nice list there." - John ]
Cooley: Because you sell interconnect IP.
Tony: Absolutely. Love to hear it. And there are chips within the data
center -- lots of really critical chips -- where over half the chip
is connectivity IP; over half in terms of area, and half in terms of
power.
Cooley: In terms of power?
Tony: Yes, there are a lot of chips where that's the case. So obviously,
the PPA for that connectivity IP is going to be really critical.
The technology that we focused on right from the start was a
DSP-based transceiver architecture. What that means is there's a
thin, but really critical, layer of analog RF circuits at the front
end, at the physical layer, that interfaces with the outside world.
And the rest of the signal path is a DSP; that allows us to tailor.
We've got over 80 variants of the IP now, tailored to different
applications.
[ EDITOR'S NOTE: My Alphawave contacts say their analog front end plus
digital back end design (afe + dbe) is like a car chassis that can ...
... be tuned up for performance... Or tuned down for less power. - John ]
Tony: And we're going to have over 150 analog IP by the end of the year.
So, we've got variants for PCI Express, Gen 5, Gen 6, CXL, Ethernet
transceivers for a medium reach, long reach.
Everything down to die-to-die interfaces, with the separating die
only a couple of millimeters apart or less.
And then you've got all the technology variants -- everything from
12nm, 7nm, 6nm, 5nm, 4nm, and 3nm now -- variants of the IP. And
then a new 200 GB/sec SerDes IP and a PCI Gen7 demonstrator is
coming out later in this year.
[ EDITOR'S NOTE: Because I hate vague boastful claims, I repeatedly
beat-up the Alphawave folks to give me their *entire* list of IP and
protocols they currently have. Here's what I got:
(Keep in mind each comes in 12nm, 7nm, 6nm, 5nm, 4nm, 3nm sizes now.)
PCIe SerDes PHYs:
Alphawave has PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4,
PCIe Gen5, PCIe Gen6 including backward compatibility
Ethernet SerDes PHYs:
Alphawave has CEI-112G-XSR/VSR/MR/LR-PAM4, CEI-56G-XSR/VSR/MR/LR-PAM4
(support NRZ, too), CEI-28G-VSR/SR/MR, CEI-25G-LR, CEI-11G SR/MR/LR,
and CEI-6G SR
Alphawave's Ethernet SerDes are configurable from 1-112G by the end
customer and they support the following 62 protocols:
100GAUI-1 C2M, 200GAUI-2 C2M, 400GAUI-4 C2M, 100GAUI-1 C2C,
200GAUI-2 C2C, 400GAUI-4 C2C, 100GBASE-CR1, 200GBASE-CR2,
400GBASE-CR4, 100GBASE-KR1, 200GBASE-KR2, 400GBASE-KR4,
50GAUI-1 C2M, 100GAUI-2 C2M, 200GAUI-4 C2M, 50GAUI-1 C2C,
100GAUI-2 C2C, 200GAUI-4 C2C, 50GBASE-CR1, 100GBASE-CR2,
200GBASE-CR4, 50GBASE-KR1, 100GBASE-KR2, 200GBASE-KR4, CAUI-4,
25GBASE-CR, 25GBASE-KR, 50GBASE-CR2, 50GBASE-KR2, 100GBASE-CR4,
100GBASE-KR4, 40GBASE-CR4, 40GBASE-KR4, 100GBASE-CR10,
100GBASE-KR10, XAUI, 10GBASE-SR, 10GBASE-LR, 10GBASE-ER,
10GBASE-SW, 10GBASE-LW, 10GBASE-EW, 10GBASE-KR, 10GBASE-CR,
1.25GPON, 1.25GEPON, 2.5GPON, 2.5GEPON, 10G EPON, 1.25GbE,
CPRI (0.614 Gbps, 1.228 Gbps, 2.456 Gbps, 3.072 Gbps, 6.144 Gbps,
9.8304 Gbps, 10.1376 Gbps, 12.16512 Gbps, 24.33024 Gbps,
24.576Gbps, 19.66 Gbps, 9.83 Gbps)
Alphawave Ethernet Controllers:
Full Ethernet Controllers with MAC/PCS/FEC they have: 1GE, 2.5GE,
5GE, 10GE, 25GE, 40GE, 50GE, 100GE, 200GE, 400GE, 800GE, FlexE 2.2
FEC Support: FC FEC, KR4 FEC, LL FEC, KP4FEC and CK-FEC
PCS Variances: 10M/100M/1G/2.5G SGMII, 5G and 10G QSGMII
CPRI/FC PCS Support: CPRI Option 1 to 10, and FiberChannel
10GFC, 12GFC, 16GFC, 32GFEC, 64GFC and 128GFC
Alphawave OTN IP:
OTL3.4, OTL4.4/10, OTU1/2/3/4 with GFEC, OTUC1/2/3/4/8,
FlexO-1/2/4-SR/RS, SONET OC-3/12/48/192 and
SDH STM-1/4/16/64 HO Framers
Alphawave D2D IP:
UCIe, BOW, OHBI (all which can be configured to run from
2Gb/s up to 16Gb/s for each bit.
"Wow. That's the first time I actually had to list that all
out," said the Aphawave guy. "But now that I have this list,
I can send it to any customer who asks for it. Cool." - John ]
Tony: So, it's again, the right market, and right technology. And then,
and then you said, you know, not only 4 years. The truth is, it
hasn't really been only 4 years. I've personally worked with this
founding team 20 years ago. We're focused on the same market of
Connectivity and IP.
So, Alphawave is sort-of-3-companies-later -- and it's really 20
years in the making.
Cooley: But aren't you limited by ... so you described an architecture of
A-to-D, then a bunch of DSP, then D-to-A.
There are some limits there. You can't DSP process that fast.
How many GHz can you process? That's your choke point.
Tony: Yes, that's where it was a key inflection point here.
Back when Alphawave was getting started in 2017, it wasn't clear
that a DSP-based architecture could offer the PPA of an analog
mixed-signal based architecture could, for the reasons you said.
But there was an inflection point there where the technology
node scaling around 12nm to 7nm got to where we could make use
of *parallel* DSP processing.
We got *parallel* DSP scaled down to the point where (although
Alphawave didn't invent a DSP based transceiver architecture)
we led the industry and demonstrated that using a digital DSP-based
architecture in these advanced nodes (12/7/6/5/4/3nm) can have
a PPA that essentially renders the analog AMS transceivers obsolete
at this point.
So again, it's the shrinking DSP logic and making use of
*parallelism* that allows us to hit these very high data rates.
Cooley: What's your upper frequency for your A-to-D, D-to-A?
Tony: We're coming out with a 200 GB/sec transceiver this year.
Cooley: Wow. Okay, have you ever thought of just selling D-to-A
and A-to-D converters?
Tony: No, I think that really the value is in the DSP though. Again,
that's what's allowed Alphawave to create over 150 different
variants of analog IP that are tailored to specific markets.
That's where we're really excited to continue growing. In fact,
we're expanding out more in that direction with a lot of soft IP
and to be able to deliver more complete HW & SW solutions.
[ P.S. Scroll up for the complete IP & protocol list I beat out of them! - John ]
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