( ESNUG 563 Item 6 ) -------------------------------------------- [03/09/17]

Subject: Anirudh and Sawicki on IC Compiler II, Innovus, Nitro-SoC, Antun
                DAC'16 Troublemakers Panel in Austin, TX

   Cooley: Anirudh?

  Anirudh: Yes, John.

   Cooley: Ah, let me just read the question.  What will you do if the
           Synopsys IC Compiler II becomes a reality?  Laurie Balch of
           Gary Smith EDA didn't list your Innovus at all in her DAC
           "to-see" list, but she listed IC Compiler II.

           Is your Cadence Innovus losing steam?

  Anirudh: Well, we don't judge products by how much they appear on
           "to see lists", right?  We judge products by how they're
           doing in the marketplace.  So my Innovus is doing
           phenomenally well and if you want to talk about a tipping
           point -- I think the real tipping point is going to happen
           (and is happening) at 10 nanometers and 7 nanometers.

           And I think a lot of the advanced PnR customers are moving
           to 10nm and 7nm, and there is a huge opportunity.

           And for Innovus, the key thing is that we have much better
           PPA and this is proving out over and over and over again...
           we are really appreciative of the opportunities we are
           getting from our top customers.  We are expanding our PnR
           usage, we are glad to work with them, we are glad they
           deploy our tools.  So Innovus is doing phenomenally well
           for a product that is only out for a little more than a year.

           So I expect that this will last for a long time, for several
           years, this transition to Innovus -- and also the surrounding
           tools.  It's not just PnR; you have to make sure your PnR
           works well with signoff, works well with synthesis.  So we
           couldn't be happier with the customer response and we are
           very thankful for that.

        ----    ----    ----    ----    ----    ----    ----

   Cooley: Jim, is IC Compiler II fixed?

    Hogan: Well, I'll answer the question but first I want to acknowledge
           the passing of Gary Smith.  I miss him on my left, right?  So
           anyway, thanks to Gary and everything he did for the industry.
           I really miss him a lot personally and I'm sure the industry
           is not as well off.
      
           So what do I think of IC Compiler II?  I think Antun doesn't
           sleep well.

           [Hogan looks at Anirudh]  I think he's doing a really great job.

   Cooley: Who is "he"?

    Hogan: Anirudh.  Anirudh's done a great job, not just bringing in
           place & route to Cadence, but the whole portfolio of products
           required for physical design.  And he's tremendously aggressive
           and done a great job in a very short period of time.

           [Hogan turns to Anirudh again]  Congratulations.

           Look Anton's not here today, so he can't defend himself, but
           in defense of his IC Compiler II, it's a monumental task to
           bring up new place & route system -- I've done it a couple
           times.  And IC Compiler II works, but does it work as well
           as Anirudh's Innovus?

           I think Anirudh's got *the* PnR solution right now.

        ----    ----    ----    ----    ----    ----    ----

   Cooley: So Joe, what do you think about IC Compiler II versus Innovus?
           And I know you have a horse in that race too.  You have Nitro,
           but out of the two...

  Sawicki: But I can't talk about that one (Nitro)?  [audience laughter]

           It's kind of funny, I would make the argument -- about four
           years ago, I would talk to people all the time saying that
           one of the problems you have in place & route is there are
           four companies you can get a chip done with.

           Any particular chip might have a little bit better power, a
           little bit better area, depending, but they could all get
           something done.  Certainly the stuff that came out of Cadence
           changed the questions in terms of time to that PPA.

   Cooley: You're saying that Innovus is faster, or is it because it
           can handle the lower nodes?

  Sawicki: When Innovus came out, it was much faster than the rest of the
           PnR market -- which caused most of us to have to go move and
           try to respond back to that.

           I still think you have the situation where every PnR tool can
           get a chip done.  ICC II has gotten better.  I don't hear
           people screaming about it as much anymore.  So we'll see how
           the market plays out. 

           We've responded with our Nitro-SoC and had good results in
           terms of PnR performance.  We (Nitro-SoC) are obviously a
           much smaller player in the market at this point.  But we're
           still doing well in certain places.  But clearly the
           competitive dynamics over the last couple of years have changed.

   Cooley: Wow, to get a rival to say that, that's big.

  Sawicki: I didn't say they were better, I just said they changed the
           dynamic.  [audience laughter]

  Anirudh: But I do want to make a comment about this question of "works".
           So there are a lot of knowledgeable people in this audience.
           When you're doing a chip, there are a lot of blocks.  So let's
           remember the chips can be 100 million instances, or 500 million
           instances.  PnR blocks are like 5 million instances.

           So your design can have 50 to 100 hundred inst blocks, right?

           So what it means when your PnR "works", is you can use a tool
           to do maybe 30, 40 maybe 50% of the blocks which are not timing
           critical nor power critical.  But the real value of a PnR tool
           is when it comes to the *critical* parts of the design, the CPUs,
           the GPUs, the other critical blocks.

           So yes, some PnR tools can "work" on *some* parts of your design,
           but for leading customers, you have to do the difficult blocks,
           and you have to better PPA -- and that changes the game
           completely for the PnR customer.

  Sawicki: The part I would shade on that is what I have seen, is that if
           you go through one block, there's high performance cores.  And
           the leadership in high performance cores has flipped around a
           little bit, it bounces.

           But there are other parts of the design, where what you're
           really concerned about is power and area.  Sometimes you'll get
           one tool, I mean, Nitro/Olympus has always been really, really
           good at low power & low area.  High performance?  That's
           something that takes a little more work from the AE force.

           And so that's why I think you see so many of the customers are
           still sitting there using a minimum of two PnR solutions,
           sometimes three PnR solutions -- and they combine them all on
           their chips.

           I'm not sure people are using solely Cadence Innovus.  But it's
           such a weird space, you're doing so many micro optimizations,
           that certain PnR tools can land a block in a better place than
           the others -- and it's not always the same PnR tool.

   Cooley: Hmm, Alright.

         ----    ----    ----    ----    ----    ----    ----

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