( ESNUG 552 Item 9 ) -------------------------------------------- [10/26/15]

Subject: Mentor and Apache Ansys on Veloce PowerArtist/PowerPro question

"Does this mean that the Ansys Power App deal using PowerArtist with Mentor Veloce 2 is now dead?"

"Is Veloce Power App cancelled?"

"So are the MENT Veloce boxes discontinuing PowerArtist in favor of Calypto PowerPro?"

"Q: How does this impace Veloce Power App?"

"Why did Veloce team up with Ansys in the first place?"

     - from http://www.deepchip.com/items/0552-01.html


From: [ Vic Kulkarni of Apache/Ansys ]

Hi, John,

First off, for the record, the Veloce-PowerArtist integration is still going
strong and not going away any time in the near future.

The collaboration between Mentor Veloce emulation and Apache PowerArtist
RTL power analysis was driven by our common customers who want to profile
power during complex scenarios for apps like OS and firmware boot-up, 1080p
and 4K video streams, etc.  We created "PAVES" (PowerArtist VEctor Streaming
Socket) for this inter-operability flow.

Of course, this partnership is non-exclusive.  Both MENT and ANSS can bridge
with other partners as driven by customer and business demands. 

Concerning this:

        "Why did Veloce team up with Ansys in the first place?"

Since the day Sequence DA merged with Apache and subsequently with ANSS, I
have continued to drive the RTL power business with our worldwide team.
         
I'm proud to report that 16 out of 20 top semi companies have deployed
PowerArtist over the years and we now have over 70 customers using it:
Samsung, NVIDIA, Ciena, ST, and Imagination Technologies to name a few. 

Based on the GSEDA Analyst Reports, our PowerArtist RTL Power business has
grown over 400% since the 2011 Apache/ANSS merger.  One of your DeepChip
readers captured PowerArtist vs. PrimeTime-PX use-cases well with this:

  "... we still like PowerArtist because it lets us do early
   RTL-level power optimation 30X faster than a PrimeTime-PX/VCS
   flow that is within 10% of final post-layout GDSII.  It allows
   us to do rapid 'what-if' analysis at RTL and evaluate various
   FSDB files and micro-architectural scenarios. 

   Our engineers fundamentally believe that the really significant
   power tradeoffs must happen at the early RTL and architectural
   level -- where PowerArtist works -- instead of at gate-level
   where PrimeTime-PX works.

   Gate-level is simply too late for the big power-cutting changes."

       - from http://www.deepchip.com/items/0545-02.html

I would also like to add the current status of PowerArtist:

  - 100M+ gate capacity and >20X performance vs. synthesis-based
    gate-level power approaches that annotate results back at RTL.

  - Accurate physical-aware RTL power (including our unique clock
    modeling that gives RTL clock power accuracy within 10% of the
    gate-level sign-off power for 16FF, 14nm and below.

  - Cycle-accurate metrics for chip clock-gating and power-efficiency

  - 5X faster cycle-by-cycle power with a multi-threaded engine for
    heat-sensitive designs.

  - Block-level clock- and data-gating for up to 50% power reduction.

  - RTL power analysis-driven automated RTL power reduction including
    sequential techniques for flops.

  - Regression framework with industry-standard Tcl interface.

  - Unique RTL Power Model (RPM) driven early power grid prototyping
    and sign-off for critical power scenarios with RedHawk.

Which is why Veloce teamed with with ANSS PowerArtist in the first place.

    - Vic Kulkarni
      Apache Business Unit, ANSYS                San Jose, CA

        ----    ----    ----    ----    ----    ----   ----

From: [ Jean-Marie Brunet of Mentor ]

Hi, John,

I would like to confirm our continuous commitment to integrate Veloce to
PowerArtist from Ansys.  As we explained during our launch before DAC,
this integration was driven by common customer demands.

Since this launch we have seen a high degree of interest in the integration,
as indicated by the responses you received on the Calypto acquisition.

Veloce Power App was architected to work with all power analysis tools,
as the announcement we made at DAC'15 emphasized.  Our roadmap is about an
ecosystem of industry-recognized power analysis tools.  We started with
Ansys and you can imagine our drive to expend the ecosystem to others.

We acknowledge the concerns of our customers, and want to re-assure them we
are not cancelling the Veloce program of PowerArtist integration.

    - Jean-Marie Brunet
      Mentor Graphics Corp.                      Fremont, CA

        ----    ----    ----    ----    ----    ----   ----

Related Articles

    Apache PowerArtist vs. post-Talus layout PrimeTime-PX correlation
    Hogan compares Palladium, Veloce, EVE ZeBu, Aldec, Bluespec, Dini
    MENT says Hogan missed emulation's all about power and cooling
    Lauro on CDNS Palladium-XP2 vs. MENT Veloce 2 vs. SNPS Zebu 3

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