( ESNUG 547 Item 2 ) -------------------------------------------- [02/06/15]
Subject: 55 readers on Martin Lund, DW, Cadence VIP, Specman, Memcon, analog
> Are you going to attend? This where our IP customers hang out. Same
> goes for the Memcon event in the fall, which is the only event for DDR
> and other memory IP. It's a big deal, Memcon. We're planning some
> cool things for that show -- don't miss it!
>
> - Martin Lund of Cadence IP
> http://www.deepchip.com/items/0546-01.html
He's right. You should go to Memcon. It's the only show of
its type around. No one else does memory design like Memcon.
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Memcon'14 was good.
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Great talk by Samsung about DDR4 at the last Memcon.
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I miss the old Memcon's that Mark Gogolewski used to run.
He was a walking encyclopedia of memory design.
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I though Cadence shut down Memcon after Sanjay left.
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Is it true that Sanjay has a non-compete that keeps him out
of electronics and EDA for the next 5 years? (Not that he
needs the money.
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Whatever happened to Sanjay?
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Cadence best beware that Aart has his sights scoped in on the
memory VIP market.
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> There's a lot more happening with Cadence IP that was not represented in
> your DAC IP report. For example I just got back from CES 2015 and
> I really think you should have been there. It was bursting with product
> decision makers, executives, and Designers and Architects looking for IP
> to help them differentiate and get to market faster.
>
> At CES we had 3 meeting rooms fully booked for 3 solid days.
>
> - Martin Lund of Cadence IP
> http://www.deepchip.com/items/0546-01.html
Bad advice. CES is a celebrity freak show. Chip designers
do not go there because it's not about design at all. It's
about consumer toys.
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Any HW engineer who goes to CES expecting real tech talk
will be sadly disappointed.
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I would like to know who was Lund meeting at CES?
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My wife wants me to buy her that LookSee bracelet that was in
the CES Hardware Battlefield competition.
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CES is too big for real meetings. 150,000 attendees is
for fun. Not for work.
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I saw Dr. Phil at the CES digital health session. I wanted to
ask him about System Verilog Assertions, but he didn't call on me.
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Cooley: this Lund guy is lying!
I was at CES and I didn't see Lund anywhere!
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Saw Snoop Dogg and Shaq O'Neal!
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> John: since you seem so disconnected on what I do, let me school you on
> the Cadence IP which I manage...
>
> - Martin Lund of Cadence IP
> http://www.deepchip.com/items/0546-01.html
Oh! Snap!
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I know some who's going to get a talk on not sending
angry emails.
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It's refreshing to see an engineer with balls.
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Good stuff.
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He got you.
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Bazinga!
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You deserved that, Cooley.
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Well, this guy ain't shy.
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Bazinga!
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Scandinavians aren't known for their manners.
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I like this Martin.
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Someone woke up grumpy today I see.
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> Our Tensilica IP was huge at CES'15: over 50 top tier semi companies
> and system OEMs use our HiFi DSPs. We demoed our IVP image/video
> processor IP with breakthrough energy efficiency and performance.
> Tensilica has 100's of design wins, and over 1000 different processor
> cores in full production silicon.
Why did Tensilica stop going to DAC years before it was
bought out?
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Chris Rowen is a cool guy. He gives goot tech talks.
Did you know he also founded MIPS?
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We use Xtensa for our audio and video. Good stuff.
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Why didn't Lund make at least 4 or 5 references to IoT?
It's the new new thing!
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In case you didn't know, we're one of those Tensilica
design wins that Lund is talking about.
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> Our VIP business leads the industry. It's used by over 500 companies
> around the world. With simulation VIP for over 40 protocols. And
> knowing how you distrust "vague EDA vendor claims", here they are:
>
> ARM AMBA 5 CHI, AMBA 4 ACE, AXI 3/4, AHB, APB, AMBA 4 Stream, CAN,
> Display Port, Ethernet 10/100/1G/10G, Ethernet 25G/50G, Ethernet
> 40G/100G, HDMI 1.4, HDMI 2.0, I2C, JTAG/cJTAG, LIN, MHL 3.0, MIPI
> CSI-2, MIPI CSI-3, MIPI C-PHY, MIPI DigRF, MIPI D-PHY, MIPI DSI,
> MIPI LLI 2.0, MIPI M-PHY, MIPI SLIMbus, MIPI Sound Wire, MIPI UniPro,
> NVM Express, OCP 2.2, OCP 3.0, PCI, PCIe Gen2, PCIe Gen3, PCIe Gen4,
> PCIe SR-IOV, PCIe MR-IOV, M-PCIe, PLB 6, SAS 6G, SAS 12G, SATA 3G/6G,
> SRIO 2.1, SRIO 3.0, UART, USB 2.0 w/ OTG, USB 3.0 w/OTG, USB SSIC.
>
> And, yes, our VIP runs in Incisive, Synopsys VCS, and MENT Questa
This is the second time Lund forgot to mention Specman "e";
is Cadence discontinuing it?
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Why no "e" reference?
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Cadence VIP no longer comes in Specman?
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Incisive, VCS, and Questa, only Incisive still supports "e".
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Is Specman dead?
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Why is Lund not mentioning "e" in this inventory?
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We use them for all our AMBA verification work. Their people
know ARM tech exceptionally well.
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You know the rule: Synopsys for DW, Cadence for mem and VIP.
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> For hard IP, a good example is our PCI Express offering: PCIe Gen1,
> Gen2, and Gen3, both controllers and PHYs. Root point, End point,
> and Dual mode are also provided, as is M-PCIe. We have built our
> PHYs to be multi-protocol and multi-lane.
>
> The other protocols we offer for hard IP: USB 2, USB 3, USB OTG,
> SSIC, HSCI, MIPI D-PHY, MIPI M-PHY, CSI-2, DSI, UniPro 1.6,
> DigRF v4/BIF, and MIPI SoundWire/SlimBUS. And Ethernet 100G MAC,
> 40G/10G MAC, 1G MAC, 10/100 MAC, 10G-KR, 1G PHY, XAUI/RXAUI, and
> SGMII/QSGMII.
It good to see DW has a challenger. CDNS has a long way to
catch up, but it's good to see.
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Competition is good.
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We support any company that will give us an alternative to
the Synopsys Designware dominance.
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He's taking on Aart? Good luck with that.
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Excuse me? All that hard IP is Cosmic Circuits.
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Looks like the Cosmic developers haven't expanded their
wares much since the acquisition.
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AAAAAAAAAAAAAAAHGH! I can't believe that our own Martin Lund
would put his foot in his mouth like this. You gotta keep me
anon. Plllls.
Martin's spiel about IP at Cadence makes no mention of the
COSMIC Circuits acquisition. I came in through that acquisition.
I find it so strange that there is zero mention about COSMIC
when talking about analog IP at Cadence. Why???? I'm pissed
as hell that he did not even mention us once.
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> Our best kept secret is our analog portfolio of ADC and DAC parts. Since
> we make Virtuoso and ADE, we have world class analog designers who have
> spent decades creating the highest speed, and best performing -- think
> analog noise robustness and signal strength -- IP in the industry.
Any dodo knows that just because they make Virtuoso and ADE does
not mean they have world class analog designers. What the hell
is he thinking??? This guy just does not get the business.
IP at Cadence is all Denali Denali Denali.
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Martin loses credibility when he makes statements like "we make
Virtuoso and ADE so we are great analog designers."
Does he have any idea that analog designers are not tool
developers??? We hate developing tools. We design circuits.
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> Our IP Group had record revenue for Q3 2014. We made up 11% of CDNS's
> revenue overall.
>
> - Martin Lund of Cadence IP
> http://www.deepchip.com/items/0546-01.html
Back of envelope, 11% of $400 M is $44 M. 4 quarters is $176 M.
Not bad growth for someone with 20 months on the job.
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If he adds, instead of subtracts, to the bottom line that's
what counts.
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I find it curious that Lip-Bu hired a Broadcom engineer and
not yet another EDA veteran to lead his new IP group.
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This guy comes from Intel, right? Only the paranoid survive?
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Martin is a professional grade entertainer. If he invites you
to a meal, go. He tells the best stories once you get a few
drinks into him.
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Related Articles:
ARM, SNPS DesignWare, Mentor VIP, plus Cadence IP went missing?
A surly Martin Lund schools Cooley on Cadence IP/VIP/memory-IP
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