( ESNUG 543 Item 2 ) -------------------------------------------- [10/31/14]

Subject: Isadore Katz on crazy uncles, Primetime and Tempus timing holes




     




             DAC'14 Troublemakers Panel in San Francisco, CA

  Isadore Katz of CLKDA on being treated as the "crazy uncle" by
  Synopsys and Cadence when he publically questions how PrimeTime
  and Tempus treat timing delays (see ESNUG 534 #3).

   Isadore: "That's because they don't do everything in STA.
             Part of CLKDA's job is to find what PrimeTime
             and Tempus don't do well -- which we do much
             better -- and to point that out a lot."

            "Look they could be 20% wrong or 50% wrong.
             That's part of why they call me the crazy
             uncle.  I piss them off."

  Both Prime and Tempus assume a Gausian distribution for delays
  when real world is non-Gausian.  Other fundamental effects that
  PrimeTime and Tempus are messing up on are Miller capacitance,
  etc.

   Isadore: "These are all the subtle things for our
             target audience; people doing high performance
             mobility chips and 16 nm and 14 nm care about
             this a lot.  Picoseconds mean a big difference
             to them."

  Plus how his CLKDA FX handles problems with MC SPICE accuracy
  by AOCV/POCV/SOCV/LVF table generation, critical path analysis,
  clock tree analysis that's injected into PrimeTime/Tempus STA,
  cell characterization, and physical optimization tools.

  Gary Smith replies "A very wise man told me a few weeks ago that
  chip timing will be in a crisis situation in about 2 years.  And
  I pretty much believe that.  I think FinFET's are going to change
  the entire chip timing story and that a lot of EDA tools that
  we're using today won't be very useful then."

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)