( ESNUG 527 Item 5 ) -------------------------------------------- [07/11/13]
From: [ Trent McConaghy of Solido Design ]
Subject: Trent on the unusual near-EDA related papers shown at DAC'13
Hi, John,
Here's 6 more "unusual" papers that covered some of the more "experimental"
aspects of advanced EDA R&D.
- Trent McConaghy, CTO
Solido Design Automation Vancouver, Canada
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Paper: Path to a TeraByte of On-Chip Memory for Petabit per Second
Bandwidth with under 5 Watts of Power
Authors: Swaroop Ghosh (U. South Florida)
This paper has an ambitious goal: to analyze the area, power, and number of
3D layers needed for 1 TB of on-chip memory that uses PB/sec bandwidth, for
various memory technologies. 1 Petabit is 1,000,000,000,000,000 bits.
One motivation for TB/sec bandwidth is modern video already needs 1.4 GB/sec
bandwidth and that higher resolution, frame rates, and color depth can
easily drive this another 1000x. Increased memory capacity is being driven
by the increase in number of cores. The paper compares SRAM, eDRAM
(capacitor-based dynamic RAM), STTRAM (Spin-Transfer Torque RAM), RRAM (aka
ReRAM, Resistive RAM, memristive RAM), and DWM (Domain Wall Memory, a
proposal by Parkin et al., Science, 2008).
According to the analysis of the paper, DWM is the most promising. In
contrast, SRAM would need two thousand (!) 3D layers and 209 KW (!)
standby power.
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Paper: Let's put the Car in your Phone!
Authors: Martin Geier et al. (TU Munich)
These authors propose simply to replace the 100 computing units (ECUs) that
are currently in the car, with your smartphone (!) and a few extra ECUs.
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Paper: The Undetectable and Unprovable Hardware Trojan Horse
Authors: Sheng Wei and Miodrag Potkonjak (UCLA)
This paper develops "an approach for automatic embedding of customizable
hardware Trojan horses into an arbitrary finite state machine" which can be
used for a variety of security attacks. And "Even after the HTH induces
provable damage, one is not capable of proving that any malicious circuitry
is embedded into the design."
The paper suggests that we should move towards synthesizing trusted systems,
rather than spend effort on detecting hardware Trojan horses. Controversial
topic.
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Paper: Gene Modification Identification under Flux Capacity Uncertainty
Authors: Mona Yousofshahi et al. (Tufts, UT Austin)
These authors described how cellular engineering is a stochastic
optimization problem. Past approaches only did deterministic optimization.
The authors leveraged research from SSTA and variation-aware design in
general to address the stochastic optimization problem. The approach can
quickly find robust, optimal solutions to the cellular engineering problems.
Doc Brown would be proud.
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Paper: Design of Cyberphysical Digital Microfluidic Biochips under
Completion-Time Uncertainties in Fluidic Operations
Authors: Yan Luo et al. (Duke, National Cheng Kung U., Taiwan)
Just as the "Gene Modification" paper used variation-aware technologies for
a cellular engineering bio problem, this paper uses variation-aware tech
for a microfluidic biochip problem.
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Paper: Can CAD Cure Cancer?
Authors: Smita Krishnaswamy et al. (Columbia, U. Zurich)
Beyond the first glance at the title, this research is perhaps not so wild
and crazy, as the authors show how a CAD system is used to automatically
derive drug targets.
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