( ESNUG 492 Item 9 ) -------------------------------------------- [09/20/11]
Subject: (ESNUG 492 #2) Reader benchmarks ModelSim Questa vs Tachyon CVC
> We had been trying to get by Modelsim PE a regression solution, but it
> took about 5 days to complete our basic regression runs.
>
> We had evaluated Modelsim SE, and Aldec Riviera-Pro. We were able to
> drop these into our sim scripts pretty quick, as both are compatibile
> with our existing Modelsim PE flow. Both SE and Aldec were ~3X faster
> than PE but their cost was much too high for us.
>
> - from http://www.deepchip.com/items/0492-02.html
From: [ My Name Is Earl ]
Hi, John,
Please keep me anonymous.
I, too, have been in the situation where I needed more Verilog seats than
budget allows, and have found myself using both Icarus and Verilator for
some design verifications. I am writing to mention another product that
is NOT free, but by price comparison based on quality does deserve mention.
It is CVC by Tachyon Design Automation Corporation, formerly known as
Pragmatic Software.
BENCHMARKING MODELSIM QUESTA VS. TACHYON CVC
I've used some pretty complex testbenches using many arrays (including
floating point arrays), where the CVC compiler from Tachyon was faster
than Modelsim Questa (the high end version of it) by a factor of 2:1.
I'm talking regression testing for a relatively small digital design of
about 150,000 gates in 0.35 micron UMC; NOT at the gate-level, but only
at the Verilog RTL level.
In that design, there were about 7,500 lines of RTL code in the design,
and the testbench was about 6,500 lines of RTL code.
The regression took Modelsim Questa 28 hours to complete, CVC completed
the work in 10 hours. This regression consists of a bash script that
calls the same testbench with different conditions repeatedly to test
all the features and automatically verify the performance.
In a more recent test that I have done with a 2nd smaller design, where
the testbench takes more time to run than the actual DUT, I ran a real
time 100 msec simulation in 6 minutes with CVC while Modelsim Questa took
over 30 minutes to run.
The testbench in this 2nd design does a state-space model simulation of
an analog circuit that is connected to the DUT and performs functional
simulation not so much for regression testing, but more for the purpose
of design analysis. We do small designs on large geometry due to the
power control nature of our business.
In this case, the RTL for the DUT was 12,000 lines and the testbench was
8,000 lines long. As you can see, there are more lines of code here,
but the design is about 1/10th the size of the previous example (about
13,000 gates).
WHERE TACHYON CVC STRUGGLES
I find that the greatest differences in speed between Modelsim Questa
and Tachyon CVC relate to the testbench part; however, we have also
noticed that CVC is often 20% to 50% faster in the gate-level sims
as well. Where Tachyon CVC does NOT shine is that we run into some
trouble using SDF back-annotation with it. We can get it to work, but
it seems to be not consistent.
CVC also handles a limited set of System Verilog functions.
We tend to use CVC more for functional verification and development, but
we still use Questa for the back end validation steps.
PRICE / PERFORMANCE
I can buy 3 seats of Tachyon CVC for the price of 1 seat of Modelsim
Questa. So I convinced my management to give me 2 additional seats of
it, and we have no SW resource limitations any longer.
While Modelsim Questa comes with its own wave form viewer, we have found
GTKWave to be very nice indeed, and it is free. So using it together
with CVC, is a great combination.
GOOD FOR SMALL DESIGNS
I have NOT had an opportunity to use it with large designs such as those
found in much of the communications, graphics, and other DSP intensive
applications where the gate counts get into the millions. So I cannot
address that behavior with my current experience with it.
We have been using CVC now for almost 2 years. For our small designs, we
like the speed advantage CVC gives us.
- [ My Name Is Earl ]
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