( ESNUG 488 Item 6 ) -------------------------------------------- [03/01/11]
From: Brett Cline <bcline=user domain=forteds got calm>
Subject: Brett Cline's DVCon/NASCUG Trip Report & Wally's Keynote Address
Hi John,
It's been a long 8 days on the road in Japan and then DVcon in San Jose.
I wanted to give you a mini trip report. Honestly, I haven't even been to
DVcon in a few years so I didn't know what to expect. With the attendance
dwindling it didn't seem to make sense though I heard that the technical
program remained reasonable. This year Forte decided to send engineers to
the conference and also exhibit.
DVCON & NASCUG ATTENDANCE:
I didn't get an exact number of attendees, but the conference organizers
told me that the numbers were up (aren't they always?) 10% to 15% to over
650. I haven't checked these numbers against past years. The technical
program looked reasonable with a number of top-tier customer presentations
that covered all kinds of topics from verification coverage, intelligent
testbenches, design modeling, etc.
What was interesting to me is how prevalent SystemC is becoming at all of
the conferences including DVCon. As an example, on Monday at DVCon for a
number of years has been SystemC Day and the North American SystemC Users
Group (NASCUG) meeting. The number of attendees that I heard for SystemC
Day this year was over 100 with 75 people attending the tutorial sessions
(for an additional cost to their registration). Customer presentations
were the highlight of the meeting showing a significant SystemC investment.
THE EXHIBIT BOOTHS:
The "tradeshow" portion of the conference was reasonable though it is quite
small. The small footprint allowed the attendees to really see all of the
vendors, get demos, and ask questions. Forte hasn't attended in a long time
so I was a bit skeptical. But, since we are seeing a substantial uptick in
business from the US market over the last 12 months, we decided that it was
time to get more involved locally. I think it was worthwhile overall.
In our booth we demonstrated a USB 2.0 running on an FPGA board designed by
a small IP company called "High-IP". Their USB function was completely
designed in SystemC and synthesized to RTL with our Cynthesizer SystemC
synthesis product (and into the FPGA board using FPGA synthesis tools). The
end result is that the FPGA board "looked" like a giant USB stick when
plugged into the demo PC. We showed files being transferred back and forth
to the FPGA as well as connecting and disconnecting the HW from the PC.
For people who have been following high-level synthesis (HLS) and SystemC
for a while this isn't a "typical HLS design." Usually the HLS vendors
show some filters or image processing designs that come from a completely
un-timed algorithm. (We've done that too so I'm not pointing fingers.)
This time we thought we would change it up a little and show the USB which
is a control-based design. It turns out that SystemC provides a much more
elegant coding style even for control-based designs and great QoR (with the
right synthesis tool, of course) So, take an unexpected style of design,
combine it with real hardware running combined with real hardware and the
reaction from the attendees was extremely positive.
You can't do control-based design like this easily with ANSI-C!
And I must now note for a company that told us in DeepChip at every turn that
"ANSI-C is all you'll ever need" and "SystemC is just low-level RTL", Mentor
Graphics sure seems to have found religion very recently. Even CatapultC
announced a SystemC version some time last year -- though it seems to be
struggling in the market.
WALLY'S KEYNOTE ADDRESS:
On Tuesday afternoon I was also able to attend Wally's keynote though I
showed up a little late. As always, Wally was great. He's a fantastic
public speaker and his sense of humor always comes though. What sets
Wally apart though is the data in his presentations. A lot of data in
a room full of engineers is great. So many EDA marketing people don't
understand that one fact!
Wally indicated that Verilog and VHDL are trending down rapidly.
And, while much of he slack is being picked up by System Verilog (which is
really just Verilog with some better verification stuff), SystemC had some
significant numbers. His survey data showed that SystemC was being used
by approximately 19% of the respondents.
VHDL 2009: ############## 27%
2010: ########### 21%
2011: ######## 16%
Verilog 2009: ################################## 68%
2010: ########################### 53%
2011: ######################## 47%
System Verilog 2009: ############ 24%
2010: ############################## 60%
2011: ##################################### 74%
SystemC 2009: ######### 17%
2010: ######## 16%
2011: ########## 19%
ANSI C/C++ 2009: ############### 30%
2010: ################## 35%
2011: ################ 32%
Specman "e" 2009: ######## 16%
2010: ######## 15%
2011: ###### 11%
Synopsys Vera 2009: ##### 11%
2010: #### 8%
2011: # 3%
This is consistent with other data that I've seen.
Wally also spent time discussing the value of moving to a high-level of
abstraction on verification results. Everyone knows the standard pitch
for HLS is you get better design productivity. What people don't
understand is that the verification productivity increases significantly
as well:
basic SW simulation 1X :: design X
accelerated simulation 10X :: design X
accelerated TLM simulation 50X-500X :: design X
During Wally's keynote I couldn't help but sit there and think of what he
and his team must be going through with all of this Carl Icahn news. The
rumor mill was in full force with most conversations ended up covering
the "Mentor situation" at some point. A number of people I talked to
noticed there were a lot of long faces on the MENT employees walking around
the show. I noticed this too -- except for Dennis Brophy who I sat next
to at the keynote. He's always upbeat.
Clearly SystemC has become the standard design and modeling language for
high-level design methodologies. The predictions I made are coming true.
Perhaps it is time we resurrect our little SystemC bet from a few years
ago -- or are you "chicken", John?
- Brett Cline
aka "the SystemC poster boy"
Forte Design Systems Acton, MA
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