( ESNUG 475 Item 3 ) -------------------------------------------- [09/18/08]

Subject: Sequence PowerArtist/Cooltime, Calypto PowerPro, Azuro, Atrenta

DON'T LOOK HERE: There's something odd I noticed here.  I know for a fact
that Synopsys, Magma, Mentor and Cadence all spend big bucks marketing their
low power solutions du jour -- yet it's Sequence, Calypto and Azuro tools
that got user mindshare for low power at this DAC.


    "What were the 1 or 2 or 3 INTERESTING specific tools that you
     saw at DAC this year?  WHY where they interesting to you?   
     (If any were under NDA say it and I'll keep you anon on them.)"

         ----    ----    ----    ----    ----    ----   ----

  Calypto PowerPro CG:

  An automated power reduction tool.  Makes an RTL->RTL transformation
  adding in lots of clock gating signals with some very fancy analysis.
  They actually generate new signals to use for clock gating enables.  They
  also use activity numbers to gauge if a enable signal is needed.  Also
  have a formal verification tool that does equivalence check on input and
  output RTL.  They Claim that in an aggressively gated customer design
  with 400 K flops ~50% already gated they were able to find 200 K more
  enable signals.  I have a free analysis tool from them that analyzes the
  amount of clock gating that a design currently does.

  Sequence PowerArtist:

  We have a license for their Power Theater tool.  They now have a Power
  Artist tool that also does automated power reduction using an RTL->RTL
  transformation.  Unfortunately I was not able to talk in detail about
  their optimization techniques all I got was something like 9 different
  techniques addressing clock, memory, and datapath.

      - Norm Zhou of Ambarella

         ----    ----    ----    ----    ----    ----   ----

  Calypto's PowerPro CG, because it offers power optimization, which could
  never be done manually at (nearly) zero cost (area or performance).

      - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

  Sequence PowerArtist.  The fact that they have OA interface, new enables
  added on the registers forward and backward in a pipeline to generate
  more clock gating opportunities, and having PowerTheater engine for
  analysis within the tool.

      - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

  1.) PowerArtist is a new tool from Sequence that in my opinion stole
  the show at DAC.   Both Calypto and Sequence Design will tell you that
  there is a tremendous amount of wasted power in your design and help
  you find it by recommending modifications to RTL, however, PowerArtist
  goes much farther.

  PowerArtist, altogether eleven, "PowerBots" provide multiple techniques
  across historically the three most power hungry segments of RTL: clock,
  memory and datapath.

  Clock gate recommendations may never come if the enable for that clock
  gate is missing.  PowerArtist will recommend the RTL, produce the enable
  and show you the power savings.  PowerArtist can also optimize vectorless
  which is what you would want simply because there is rarely a complete
  set of applications in existence to test all permutations of the logic.
  A vectorless optimization will guarantee that all applications will see
  at least the recommended improvement.   However, vectors can also be
  used to verify the results.   

  PowerArtist has a well designed user interface, Power Canvas.   Cross
  probing RTL to a very readable generated schematic, sorting/filtering,
  analysis windows and a list of prioritized RTL changes work together very
  well to provide the perfect RTL "Design for Power" environment.

      - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

  I was really interested in Sequence Cooltime's clock jitter analysis
  using dynamic IR drop information.  Not too many tools handle this and
  Sequence seems to be a frontier vendor taking this challenge on.  I've
  have my core clock signals jitter due to dynamic IR drop noise which
  caused problems.  Lots of companies have voltage compression requirements
  to help alleviate this problem but I think an actual timing analysis is
  very valuable.

      - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

  Azuro CTS - made with amazing understanding of CTS complexity, no one
              else implement the CTS with such attention.

      - Dalia Karmon of Zoran

         ----    ----    ----    ----    ----    ----   ----

  My focus being power, I have relied on SpyGlass to get closure on some
  of the most complex low power designs (multiple dynamic power domains).
  With our Synopsys synthesis and layout flow, Atrenta helped us avoid
  show stopper problems during tape-out. 

      - Hongyu Xie of Marvell Semi

         ----    ----    ----    ----    ----    ----   ----

  Atrenta 1-Team

  For its capability to do power analysis right early in the design flow.

      - [ An Anon Engineer ]

         ----    ----    ----    ----    ----    ----   ----

  One interesting product in DAC this year was the Atrenta 1Team-Genesis
  product.  This allows early exploration.   Claims to do what-if arch
  analysis and generate assembled RTL.  Supposedly correct by construction.

      - [ An Anon Engineer ]
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