( ESNUG 473 Item 7 ) -------------------------------------------- [05/29/08]
Subject: ( ESNUG 469 #6 ) A 2nd look at Dafca ClearBlue silicon debug IP
> We started using Dafca's ClearBlue 2 years ago. ClearBlue is a chunk of
> silicon IP that helps with silicon debug. It instruments your RTL design
> or gate level netlist to let you control/observe signals post-silicon.
>
> - Lorenzo Cali
> STMicroelectronics Milan, Italy
From: Michael Pilsl <michael.pilsl=user domain=infineon not calm>
Hi, John,
We started using Dafca ClearBlue near the end of 2005, as pilot users of
its debugger. We were developing a 90 nm test chip for high-speed serial
interfaces such as 6 Gbit/s Serial-ATA, and were looking for a method to
monitor and stimulate internal interfaces. (The fundamental idea behind
ClearBlue is to implement additional debug logic into chip so you can make
the signals visible and controllable in real time.)
We added ClearBlue instrumentation between the modules, so when we validate
our silicon, we can monitor what is going on between the modules. This
allowed us to have more visibility than you would otherwise have. It is
similar to a simulator tracing internal signals during simulation.
ClearBlue's instrumentation is just add-on RTL code that automatically
integrates into overall RTL code. It fits to your normal design flow and
doesn't require any special flows, tools, or libraries. The post-silicon
ClearBlue tools are hooked up to the chip via standard JTAG TAP controller
interface and provide easy access to all instruments.
There was negligible impact on our chip's performance, because adding
ClearBlue instruments to internal signals usually adds just one more gate to
the signal path. For our 90 nm design, ClearBlue's logic added just a few
picoseconds; no impact with our chip running at 300 MHz.
Our Serial-ATA chip had a transfer rate of 6 Gbits per sec. It had multiple
asynchronous clock domains, e.g., transmit and receive clocks, and a system
clock for the transport layer.
Because it was a test chip, there were no limits to the amount of ClearBlue
instrumentation logic we could add, so we used it to the full extent
including trace buffers.
For a production chip, we might need to be somewhat more cautious so that
we don't add too much overhead to the gate count.
We used ClearBlue to validate defined test cases in the lab, where we did
certain data transfers back and forth to our chip. (One test required the
dynamic setting of on-chip coefficient registers and the at speed read-out
of result registers. A C-based optimization algorithm linked to the
ClearBlue software API let us dynamically calculate the coefficients.
Without the integrated instruments, we wouldn't been able to do this.)
Upsides:
- The DFT scripts are automated. We had no problems with DFT insertion;
they were all supported by Dafca. Everything is in scan chains, we
executed for one clock cycle, then assess if the behavior is expected.
Both the normal logic and Dafca logic are covered by DFT.
- Transaction injection. We use ClearBlue's transaction injection to
stimulate our internal interfaces in the chip and to start
transactions over the serial interface.
- Reconfigurable triggers. ClearBlue has reconfigurable triggers to help
work around bugs that you find, e.g. if the signal between two modules
has the wrong polarity, we can fix it. It might be useful, but since
we didn't find any bugs, we didn't need to use it.
- Multi-clock domain support. If there are several different clocks and
they are asynchronous, we have to be careful that the signals don't
cross from one clock to another. E.g. we implement synchronizers to
make sure that sign transfer is behaving correctly. Dafca supports
this as we can put the instrumentation into any clock domain.
Downsides:
- We are looking for further improvement from Dafca on simplifying
the set up of simulation test cases which interact with ClearBlue
software.
- ClearBlue software runs in parallel to simulation, and sometimes
it is mandatory to stimulate the right signal at right time. It
can be difficult to synchronize the simulator and the ClearBlue
software. Dafca has started to extend their software to do this,
but was not complete at yet for our test chip development.
With ClearBlue you get something in your hands that can improve your
validation strategy for complex chips. Every problem on silicon that you
can catch in debug saves time and money.
- Michael Pilsl
Infineon Munich, Germany
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