( ESNUG 458 Item 10 ) ------------------------------------------- [11/16/06]
From: Glen Macon <glen.macon=user domain=analog got calm>
Subject: Glen's patented keep-the-CEO-happy Jupiter-XT speed floorplanning
Hi John,
At Boston SNUG this year, I participated in the Jupiter-XT floorplanning
panel. (We won best panel!) I presented and discussed my use of the JRM
Explore mode and Feasibility runs with the audience. At Boston SNUG I got
a lot of questions and thought I would share the gist of my presentation
with ESNUG. I would like to know if there are others out there who are
using the Jupiter-XT JRM Explore mode and their experiences.
The Situation: 100 K cells 2 RAMs, pad limited design. Can it route?
Explore mode is a quick way to determine whether the design can be placed
and routed. Here's how I did it in Jupiter-XT:
1.) Before running the JRM Explore mode, capture the top level pin
order and pad ring to drive flat internal core placement.
2.) Next, configure the Explore mode command file to run all 10 default
placement strategies (there are many parameters that can be
manipulated for other strategies. All of them very well documented).
3.) Run Explore mode and quickly generate all 10 default placements
then choose the best congestion placement that meets timing.
4.) Review the output and pick what looks to be the best one.
5.) I then run Feasibility mode on it. Feasibility mode tells me if I
can confidently place and route this design at this size. Of course,
manual floorplanning will probably be needed to finish the design,
but this is where the bang-for-buck comes in, I can move forward with
confidence given the first order feedback from the tool about the
size of the floorplan.
This process takes me 2 hours to run in total on a 64-bit Linux box. The
output of Explorer is an HTML page of tables for each of the 10 designs with
links to the results:
- Timing reports: the detailed timing report
- Congestion reports: a GIF a full layout of the congestion legend
- PNR Summaries: the typical place and route summary
- Log files: Jupiter-XT logfile
Simply click on a link and you can see the desired result details. The
output of Feasibility tells you your Power Grid synthesis and Analysis,
simple Clock tree synthesis, timing, and the global route details
We use this mode in the odd situation where you are looking for a bottom
line answer when your CEO/Marketing dweeb is standing over your shoulder
impatiently asking if your chip will fit into that extra small package,
tapping their toes and drumming their finger tips on your desk. This flow
will give you a quick answer (2 hours) with timing & IR-drop but without a
lot of floorplanning (and will determine if it is feasible). Then later
one can go do all the floorplanning magic voodoo that you do to create the
stunning layout that is expected. :)
- Glen Macon
Analog Devices, Inc. Wilmington, MA
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