( ESNUG 456 Item 10 ) ------------------------------------------- [07/17/06]
Subject: ( ESNUG 446 #1 ) Yea, we found Palladium II to be 2X faster, too
> We initially ported our testbench to our Palladium I using the simulation
> acceleration mode. The runtime on our critical test streams went from 7
> days to 20 minutes. Over succeeding days, we shifted to the synthesizable
> testbench emulation mode, and the moved the effort to Palladium II. Our
> test time dropped from 20 minutes to 3 minutes with an effective clock
> speed of 1 MHz.
>
> - Tom Weiss
> ATI Yardley, PA
From: Joerg Kayser <jkayser=user domain=de.ibm spot calm>
Hi, John,
I worked closely with Cadence during the development of their Palladium II
emulator, and having prior used Palladium I, I can directly accentuate the
differences that we found between the two emulators.
1. Capacity
The maximum capacity is about 2X higher for Palladium II. Palladium I could
handle up to 130 M gates and now the capacity of 256 M gates available.
Each logic board holds 16 M gates and is encapsulated in a nicely shaped
box. Two of the boxes can be stapled, and a maximum of 16 boards can be
connected with cables. If the capacity demand is lower than a full board,
1/3 or 2/3 populated boards can be ordered as well. The model compiler can
cope with models of this size by linear scaling. We have already built
models up to 210 Million gates using the new emulator.
2. Speed
We have seen a 2x improvement in Palladium II's maximum speed for the same
size models. For example, for models that ran between 150-800 kHz on
Palladium I, we are now in the ball park of 300 kHz - 2 MHz.
3. Model relocation
Another interesting aspect of Palladium II, that we did not exploit too much
on Palladium I, is model relocation being enabled due to the symmetrical
structure of the system. With Palladium II you can build a 1 brd model such,
that you can run it on any other board in the emulator. And you can run
multiple instances of same model at same time. So if a lot of cycles are
required, a recompilation of your model is not required. They are still
different simulations, but they are running in parallel instead of serial as
long as the capacity is available. This is really another aspect of their
multi-user functionality. With this feature we achieved on a 10 M gate
design a total throughput of 500 billion cycles in a single day.
4. Number of users
Palladium II now supports 32 users versus 16 users for Palladium I. The
Cadence software is able to support up to 8 users per board, but as our
models are bigger, we use the granularity of a full board to build and
schedule our jobs. With this approach we can still run up to 16 simulation
jobs at a time with about 16 M gate capacity each.
5. Simulation Acceleration (SA) Cards
SA cards are used to improve the communication speed of the model to the
host workstation, while running simulation. With Palladium I, the number
of simulation acceleration cards on AIX was limited to 2, while now with
Palladium II we can use more simulation acceleration cards. This is
changing the mode of operation on how we do these jobs.
- More users are using SA cards to speed up simulation
- Models can be relocated to other SA cards, when one is occupied. This
increases the machine utilization
- With more SA cards we can support more small models as before
6. Number of I/Os.
Palladium I already supports the attachment of hardware to the simulation
model, and Palladium II extends this now to 60,000 pins. However, we don't
use that many pins, as we use the platform more for simulation acceleration
rather than In Circuit Emulation.
7. Setup and usage.
The setup for Palladium II is similar to Palladium I. However, it is not
the just the same emulator with more capacity. We have more users on it
and run more batch jobs, so the utilization is higher -- we keep the machine
occupied day and night, with local and remote users, with interactive and
batch jobs.
Major differentiator between Palladium I and Palladium II...
- Workstation outside the emulator can be loading to connect the model
and transfer data.
- The compiler time scales (mostly) linear with the model size.
- The machine capacity can be utilized to a very high degree without
connectivity constraints. We've utilized 87% of its max capacity.
- Processor based emulation hardware has very predictable results. Once
a model is compiled, you don't have to deal with timing issues anymore.
Palladium II's biggest drawbacks...
- I have the same comments for Palladium II as I did for Palladium I: it
is a very complex, large environment and very expensive, so it could
always be smaller and cheaper. However, this is an area where nothing
else but speed matters, which helps to justify the expense.
- Our focus with Palladium is hardware software co-verification. We have
many lines of code, which run on the processors modeled within the
emulator. But even more code is still running outside and has to
communicate with the model through the Simulator program interface.
So for us, the interaction between hardware and software is critical, and
this is where the Palladium platform helps us to get the verification job
done in a reasonable time. And it helps us to debug an error, where tracing
allows a detailed view into the model, something that cannot be done on a
real hardware.
- Joerg Kayser
IBM Labs Boeblingen, Germany
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